[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <d2579e10-e5c2-0d99-4233-19318a1db6c1@kapsi.fi>
Date: Wed, 23 Feb 2022 11:44:02 +0200
From: Mikko Perttunen <cyndis@...si.fi>
To: Christoph Hellwig <hch@...radead.org>,
Mikko Perttunen <mperttunen@...dia.com>
Cc: thierry.reding@...il.com, jonathanh@...dia.com, joro@...tes.org,
will@...nel.org, robh+dt@...nel.org, robin.murphy@....com,
linux-tegra@...r.kernel.org, dri-devel@...ts.freedesktop.org,
iommu@...ts.linux-foundation.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v3 3/9] gpu: host1x: Add context device management code
On 2/22/22 18:24, Christoph Hellwig wrote:
> On Fri, Feb 18, 2022 at 01:39:46PM +0200, Mikko Perttunen wrote:
>> +
>> +/*
>> + * Due to an issue with T194 NVENC, only 38 bits can be used.
>> + * Anyway, 256GiB of IOVA ought to be enough for anyone.
>> + */
>> +static dma_addr_t context_device_dma_mask = DMA_BIT_MASK(38);
>
> You need a mask per device. Please don't share the same variable
> for multiple masks.
>
>> +EXPORT_SYMBOL(host1x_context_alloc);
>
> All this low-level code really should be EXPORT_SYMBOL_GPL.
Thanks, will fix (and same for patch 2).
Mikko
Powered by blists - more mailing lists