linux-kernel - Re: [PATCH 00/11] KVM: x86: Prep work for VMX IPI virtualization

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Date:   Thu, 24 Feb 2022 15:58:50 +0100
From:   Paolo Bonzini <pbonzini@...hat.com>
To:     Sean Christopherson <seanjc@...gle.com>
Cc:     Vitaly Kuznetsov <vkuznets@...hat.com>,
        Wanpeng Li <wanpengli@...cent.com>,
        Jim Mattson <jmattson@...gle.com>,
        Joerg Roedel <joro@...tes.org>, kvm@...r.kernel.org,
        linux-kernel@...r.kernel.org, Zeng Guang <guang.zeng@...el.com>,
        Chao Gao <chao.gao@...el.com>,
        Maxim Levitsky <mlevitsk@...hat.com>
Subject: Re: [PATCH 00/11] KVM: x86: Prep work for VMX IPI virtualization

On 2/4/22 22:41, Sean Christopherson wrote:
> Prepare for VMX's IPI virtualization, in which hardware treats ICR as a
> single 64-bit register in x2APIC mode.  The SDM wasn't clear on how ICR
> should be modeled, KVM just took the easier path and guessed wrong.
> 
> Hardware's implementation of ICR as a 64-bit register requires explicit
> handling to maintain backwards compatibility in KVM_{G,S}ET_REG, as
> migrating a VM between hosts with different IPI virtualization support
> would lead to ICR "corruption" for writes that aren't intercepted by
> KVM (hardware doesn't fill ICR2 in vAPIC page).
> 
> This series includes AVIC cleanups for things I encountered along the way.
> AVIC still has multiple issues, this only fixes the easy bugs.
> 
> Sean Christopherson (11):
>    Revert "svm: Add warning message for AVIC IPI invalid target"
>    KVM: VMX: Handle APIC-write offset wrangling in VMX code
>    KVM: x86: Use "raw" APIC register read for handling APIC-write VM-Exit
>    KVM: SVM: Use common kvm_apic_write_nodecode() for AVIC write traps
>    KVM: SVM: Don't rewrite guest ICR on AVIC IPI virtualization failure
>    KVM: x86: WARN if KVM emulates an IPI without clearing the BUSY flag
>    KVM: x86: Make kvm_lapic_reg_{read,write}() static
>    KVM: x86: Add helpers to handle 64-bit APIC MSR read/writes
>    KVM: x86: Treat x2APIC's ICR as a 64-bit register, not two 32-bit regs
>    KVM: x86: Make kvm_lapic_set_reg() a "private" xAPIC helper
>    KVM: selftests: Add test to verify KVM handles x2APIC ICR=>ICR2 dance
> 
>   arch/x86/kvm/lapic.c                          | 193 ++++++++++++------
>   arch/x86/kvm/lapic.h                          |  21 +-
>   arch/x86/kvm/svm/avic.c                       |  38 ++--
>   arch/x86/kvm/trace.h                          |   6 +-
>   arch/x86/kvm/vmx/vmx.c                        |  11 +-
>   arch/x86/kvm/x86.c                            |  15 +-
>   tools/testing/selftests/kvm/.gitignore        |   1 +
>   tools/testing/selftests/kvm/Makefile          |   1 +
>   .../selftests/kvm/include/x86_64/apic.h       |   1 +
>   .../selftests/kvm/x86_64/xapic_state_test.c   | 150 ++++++++++++++
>   10 files changed, 325 insertions(+), 112 deletions(-)
>   create mode 100644 tools/testing/selftests/kvm/x86_64/xapic_state_test.c
> 
> 
> base-commit: 17179d0068b20413de2355f84c75a93740257e20

Queued, with patch 4 adjusted.  Thanks,

Paolo