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Message-ID: <Yhi0lY8w3E5VKquU@hirez.programming.kicks-ass.net>
Date: Fri, 25 Feb 2022 11:51:01 +0100
From: Peter Zijlstra <peterz@...radead.org>
To: Josh Poimboeuf <jpoimboe@...hat.com>
Cc: x86@...nel.org, joao@...rdrivepizza.com, hjl.tools@...il.com,
andrew.cooper3@...rix.com, linux-kernel@...r.kernel.org,
ndesaulniers@...gle.com, keescook@...omium.org,
samitolvanen@...gle.com, mark.rutland@....com,
alyssa.milburn@...el.com, mbenes@...e.cz, rostedt@...dmis.org,
mhiramat@...nel.org, alexei.starovoitov@...il.com
Subject: Re: [PATCH v2 18/39] x86/ibt: Add IBT feature, MSR and #CP handling
On Thu, Feb 24, 2022 at 03:55:16PM -0800, Josh Poimboeuf wrote:
> On Thu, Feb 24, 2022 at 03:51:56PM +0100, Peter Zijlstra wrote:
> > +static __always_inline void setup_cet(struct cpuinfo_x86 *c)
> > +{
> > + u64 msr = CET_ENDBR_EN;
> > +
> > + if (!HAS_KERNEL_IBT ||
> > + !cpu_feature_enabled(X86_FEATURE_IBT))
> > + return;
>
> If you add X86_FEATURE_BIT to arch/x86/include/asm/disabled-features.h,
> the HAS_KERNEL_IBT check becomes redundant.
Cute.
> > +bool ibt_selftest(void)
> > +{
> > + unsigned long ret;
> > +
> > + asm ("1: lea 2f(%%rip), %%rax\n\t"
> > + ANNOTATE_RETPOLINE_SAFE
> > + " jmp *%%rax\n\t"
> > + ASM_REACHABLE
> > + ANNOTATE_NOENDBR
> > + "2: nop\n\t"
> > +
> > + /* unsigned ibt_selftest_ip = 2b */
> > + ".pushsection .rodata,\"a\"\n\t"
> > + ".align 8\n\t"
> > + ".type ibt_selftest_ip, @object\n\t"
> > + ".size ibt_selftest_ip, 8\n\t"
> > + "ibt_selftest_ip:\n\t"
> > + ".quad 2b\n\t"
> > + ".popsection\n\t"
>
> It's still seems silly to make this variable in asm.
>
> Also .rodata isn't going to work for CPU hotplug.
It's just the IP, that stays invariant. I'm not sure how else to match
regs->ip to 2 in #CP.
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