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Message-ID: <CABnWg9uUDH7Vo-=HTSjS7HRfdo=SQPk43ujT=jh5Q+VhAA2Hag@mail.gmail.com>
Date: Fri, 25 Feb 2022 02:52:49 -0800
From: Guillaume Ranquet <granquet@...libre.com>
To: Chun-Kuang Hu <chunkuang.hu@...nel.org>
Cc: Philipp Zabel <p.zabel@...gutronix.de>,
David Airlie <airlied@...ux.ie>,
Daniel Vetter <daniel@...ll.ch>,
Rob Herring <robh+dt@...nel.org>,
Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
Maxime Ripard <mripard@...nel.org>,
Thomas Zimmermann <tzimmermann@...e.de>,
Matthias Brugger <matthias.bgg@...il.com>,
Chunfeng Yun <chunfeng.yun@...iatek.com>,
Kishon Vijay Abraham I <kishon@...com>,
Vinod Koul <vkoul@...nel.org>, deller@....de,
CK Hu <ck.hu@...iatek.com>, Jitao Shi <jitao.shi@...iatek.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>,
DRI Development <dri-devel@...ts.freedesktop.org>,
"ARM/Mediatek SoC support" <linux-mediatek@...ts.infradead.org>,
DTML <devicetree@...r.kernel.org>,
linux-kernel <linux-kernel@...r.kernel.org>,
Linux ARM <linux-arm-kernel@...ts.infradead.org>,
linux-phy@...ts.infradead.org, linux-fbdev@...r.kernel.org
Subject: Re: [PATCH v8 06/19] drm/mediatek: dpi: implement a CK/DE pol toggle
in board config
Quoting Chun-Kuang Hu (2022-02-21 03:14:02)
> HI, Guillaume:
>
> Guillaume Ranquet <granquet@...libre.com> 於 2022年2月18日 週五 下午10:56寫道:
> >
> > Adds a bit of flexibility to support boards without CK/DE pol support
>
> I'm not sure what the term 'board' mean. Do you mean different board
> with different panel but all with mt8195-dpintf? If so, you should get
> CK/DE support from panel driver not fix this information in dpi
> driver.
>
> Regards,
> Chun-Kuang.
>
Hi Chun-Kuang,
The correct term (as pointed by Angelo) would be 'SoC' instead of
'board' I guess.
My understanding is that every SoC might have or might not have CK/DE support.
I'll try to dig into the documentation I have to understand exactly
where this support
is coming from.
Thx,
Guillaume.
> >
> > Signed-off-by: Guillaume Ranquet <granquet@...libre.com>
> > ---
> > drivers/gpu/drm/mediatek/mtk_dpi.c | 22 +++++++++++++++++-----
> > 1 file changed, 17 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
> > index 4746eb3425674..545a1337cc899 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
> > @@ -125,6 +125,7 @@ struct mtk_dpi_conf {
> > bool edge_sel_en;
> > const u32 *output_fmts;
> > u32 num_output_fmts;
> > + bool is_ck_de_pol;
> > const struct mtk_dpi_yc_limit *limit;
> > };
> >
> > @@ -211,13 +212,20 @@ static void mtk_dpi_config_pol(struct mtk_dpi *dpi,
> > struct mtk_dpi_polarities *dpi_pol)
> > {
> > unsigned int pol;
> > + unsigned int mask;
> >
> > - pol = (dpi_pol->ck_pol == MTK_DPI_POLARITY_RISING ? 0 : CK_POL) |
> > - (dpi_pol->de_pol == MTK_DPI_POLARITY_RISING ? 0 : DE_POL) |
> > - (dpi_pol->hsync_pol == MTK_DPI_POLARITY_RISING ? 0 : HSYNC_POL) |
> > + mask = HSYNC_POL | VSYNC_POL;
> > + pol = (dpi_pol->hsync_pol == MTK_DPI_POLARITY_RISING ? 0 : HSYNC_POL) |
> > (dpi_pol->vsync_pol == MTK_DPI_POLARITY_RISING ? 0 : VSYNC_POL);
> > - mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, pol,
> > - CK_POL | DE_POL | HSYNC_POL | VSYNC_POL);
> > + if (dpi->conf->is_ck_de_pol) {
> > + mask |= CK_POL | DE_POL;
> > + pol |= (dpi_pol->ck_pol == MTK_DPI_POLARITY_RISING ?
> > + 0 : CK_POL) |
> > + (dpi_pol->de_pol == MTK_DPI_POLARITY_RISING ?
> > + 0 : DE_POL);
> > + }
> > +
> > + mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, pol, mask);
> > }
> >
> > static void mtk_dpi_config_3d(struct mtk_dpi *dpi, bool en_3d)
> > @@ -799,6 +807,7 @@ static const struct mtk_dpi_conf mt8173_conf = {
> > .max_clock_khz = 300000,
> > .output_fmts = mt8173_output_fmts,
> > .num_output_fmts = ARRAY_SIZE(mt8173_output_fmts),
> > + .is_ck_de_pol = true,
> > .limit = &mtk_dpi_limit,
> > };
> >
> > @@ -809,6 +818,7 @@ static const struct mtk_dpi_conf mt2701_conf = {
> > .max_clock_khz = 150000,
> > .output_fmts = mt8173_output_fmts,
> > .num_output_fmts = ARRAY_SIZE(mt8173_output_fmts),
> > + .is_ck_de_pol = true,
> > .limit = &mtk_dpi_limit,
> > };
> >
> > @@ -818,6 +828,7 @@ static const struct mtk_dpi_conf mt8183_conf = {
> > .max_clock_khz = 100000,
> > .output_fmts = mt8183_output_fmts,
> > .num_output_fmts = ARRAY_SIZE(mt8183_output_fmts),
> > + .is_ck_de_pol = true,
> > .limit = &mtk_dpi_limit,
> > };
> >
> > @@ -827,6 +838,7 @@ static const struct mtk_dpi_conf mt8192_conf = {
> > .max_clock_khz = 150000,
> > .output_fmts = mt8173_output_fmts,
> > .num_output_fmts = ARRAY_SIZE(mt8173_output_fmts),
> > + .is_ck_de_pol = true,
> > .limit = &mtk_dpi_limit,
> > };
> >
> > --
> > 2.34.1
> >
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