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Message-ID: <YhjQtrueEYNGQrSA@orome>
Date: Fri, 25 Feb 2022 13:51:02 +0100
From: Thierry Reding <thierry.reding@...il.com>
To: Rob Herring <robh@...nel.org>
Cc: Mohan Kumar <mkumard@...dia.com>, broonie@...nel.org,
lgirdwood@...il.com, tiwai@...e.com, jonathanh@...dia.com,
spujar@...dia.com, alsa-devel@...a-project.org,
devicetree@...r.kernel.org, linux-tegra@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 4/6] dt-bindings: Add HDA support for Tegra234
On Thu, Feb 24, 2022 at 01:31:41PM -0600, Rob Herring wrote:
> On Wed, Feb 16, 2022 at 02:52:38PM +0530, Mohan Kumar wrote:
> > Add hda clocks, memory ,power and reset binding entries
> > for Tegra234.
> >
> > Signed-off-by: Mohan Kumar <mkumard@...dia.com>
> > ---
> > include/dt-bindings/clock/tegra234-clock.h | 4 ++++
> > include/dt-bindings/memory/tegra234-mc.h | 6 ++++++
> > include/dt-bindings/power/tegra234-powergate.h | 9 +++++++++
> > include/dt-bindings/reset/tegra234-reset.h | 2 ++
> > 4 files changed, 21 insertions(+)
> > create mode 100644 include/dt-bindings/power/tegra234-powergate.h
> >
> > diff --git a/include/dt-bindings/clock/tegra234-clock.h b/include/dt-bindings/clock/tegra234-clock.h
> > index 2529e7ec0bf4..2ab651916127 100644
> > --- a/include/dt-bindings/clock/tegra234-clock.h
> > +++ b/include/dt-bindings/clock/tegra234-clock.h
> > @@ -64,4 +64,8 @@
> > #define TEGRA234_CLK_PLLC4 237U
> > /** @brief 32K input clock provided by PMIC */
> > #define TEGRA234_CLK_CLK_32K 289U
> > +/** @brief CLK_RST_CONTROLLER_AZA2XBITCLK_OUT_SWITCH_DIVIDER switch divider output (aza_2xbitclk) */
> > +#define TEGRA234_CLK_AZA_2XBIT 457U
> > +/** @brief aza_2xbitclk / 2 (aza_bitclk) */
> > +#define TEGRA234_CLK_AZA_BIT 458U
> > #endif
> > diff --git a/include/dt-bindings/memory/tegra234-mc.h b/include/dt-bindings/memory/tegra234-mc.h
> > index 2662f70c15c6..c42fe61fba5e 100644
> > --- a/include/dt-bindings/memory/tegra234-mc.h
> > +++ b/include/dt-bindings/memory/tegra234-mc.h
> > @@ -7,6 +7,8 @@
> > #define TEGRA234_SID_INVALID 0x00
> > #define TEGRA234_SID_PASSTHROUGH 0x7f
> >
> > +/* NISO0 stream IDs */
> > +#define TEGRA234_SID_HDA 0x03
> >
> > /* NISO1 stream IDs */
> > #define TEGRA234_SID_SDMMC4 0x02
> > @@ -16,6 +18,10 @@
> > * memory client IDs
> > */
> >
> > +/* High-definition audio (HDA) read clients */
> > +#define TEGRA234_MEMORY_CLIENT_HDAR 0x15
> > +/* High-definition audio (HDA) write clients */
> > +#define TEGRA234_MEMORY_CLIENT_HDAW 0x35
> > /* sdmmcd memory read client */
> > #define TEGRA234_MEMORY_CLIENT_SDMMCRAB 0x63
> > /* sdmmcd memory write client */
> > diff --git a/include/dt-bindings/power/tegra234-powergate.h b/include/dt-bindings/power/tegra234-powergate.h
> > new file mode 100644
> > index 000000000000..3c5575a51296
> > --- /dev/null
> > +++ b/include/dt-bindings/power/tegra234-powergate.h
> > @@ -0,0 +1,9 @@
> > +/* SPDX-License-Identifier: GPL-2.0 */
>
> Dual license please.
We've got a bunch of similar files in this directory that are not
dual licensed. These files originally are part of the BPMP firmware
tree, so I'll check with the owners if relicensing would be possible.
If so, I think we should be able to relicense all of those header files.
Thierry
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