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Date:   Mon, 28 Feb 2022 08:46:57 -0800
From:   Dave Hansen <dave.hansen@...el.com>
To:     "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>,
        Dan Williams <dan.j.williams@...el.com>
Cc:     Josh Poimboeuf <jpoimboe@...hat.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
        Andy Lutomirski <luto@...nel.org>,
        Peter Zijlstra <peterz@...radead.org>,
        Kuppuswamy Sathyanarayanan 
        <sathyanarayanan.kuppuswamy@...ux.intel.com>,
        Andrea Arcangeli <aarcange@...hat.com>,
        Andi Kleen <ak@...ux.intel.com>,
        David Hildenbrand <david@...hat.com>,
        "H. Peter Anvin" <hpa@...or.com>, Juergen Gross <jgross@...e.com>,
        Jim Mattson <jmattson@...gle.com>,
        Joerg Roedel <joro@...tes.org>,
        Kuppuswamy Sathyanarayanan <knsathya@...nel.org>,
        Paolo Bonzini <pbonzini@...hat.com>, sdeep@...are.com,
        Sean Christopherson <seanjc@...gle.com>,
        "Luck, Tony" <tony.luck@...el.com>,
        Vitaly Kuznetsov <vkuznets@...hat.com>,
        Wanpeng Li <wanpengli@...cent.com>,
        Tom Lendacky <thomas.lendacky@....com>,
        Brijesh Singh <brijesh.singh@....com>, X86 ML <x86@...nel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCHv4 29/30] ACPICA: Avoid cache flush on TDX guest

On 2/28/22 08:37, Kirill A. Shutemov wrote:
>> Agree, why is this marked as "TODO"? The cache flushes associated with
>> ACPI sleep states are to flush cache before bare metal power loss to
>> CPU caches and bare metal transition of DDR in self-refresh mode. If a
>> cache flush is required it is the responsibility of the hypervisor.
>> Either it is safe for all guests or it is unsafe for all guests, not
>> TD specific.
> Do we have "any VM" check? I can't find it right away.

Yes:

> #define X86_FEATURE_HYPERVISOR          ( 4*32+31) /* Running on a hypervisor */

I'm pretty sure an earlier version of this patch used it.

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