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Message-ID: <202202282139.f38uxhKT-lkp@intel.com>
Date: Tue, 1 Mar 2022 01:35:24 +0800
From: kernel test robot <lkp@...el.com>
To: Claudiu Beznea <claudiu.beznea@...rochip.com>,
daniel.lezcano@...aro.org, tglx@...utronix.de
Cc: kbuild-all@...ts.01.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org,
Claudiu Beznea <claudiu.beznea@...rochip.com>
Subject: Re: [PATCH 5/7] clocksource/drivers/timer-microchip-pit64b: add
delay timer
Hi Claudiu,
I love your patch! Yet something to improve:
[auto build test ERROR on tip/timers/core]
[also build test ERROR on soc/for-next linus/master v5.17-rc6 next-20220225]
[cannot apply to daniel-lezcano/clockevents/next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Claudiu-Beznea/clocksource-drivers-timer-microchip-pit64b-fixes-and-improvements/20220228-191933
base: https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git 35e13e9da9afbce13c1d36465504ece4e65f24fe
config: openrisc-randconfig-r035-20220228 (https://download.01.org/0day-ci/archive/20220228/202202282139.f38uxhKT-lkp@intel.com/config)
compiler: or1k-linux-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/0day-ci/linux/commit/6050ca5a0af604ed2c397dcb907a9b057635a64e
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Claudiu-Beznea/clocksource-drivers-timer-microchip-pit64b-fixes-and-improvements/20220228-191933
git checkout 6050ca5a0af604ed2c397dcb907a9b057635a64e
# save the config file to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=openrisc SHELL=/bin/bash drivers/
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@...el.com>
All errors (new ones prefixed by >>):
drivers/clocksource/timer-microchip-pit64b.c: In function 'mchp_pit64b_init_clksrc':
>> drivers/clocksource/timer-microchip-pit64b.c:382:23: error: invalid use of undefined type 'struct delay_timer'
382 | mchp_pit64b_dt.read_current_timer = mchp_pit64b_dt_read;
| ^
drivers/clocksource/timer-microchip-pit64b.c:383:23: error: invalid use of undefined type 'struct delay_timer'
383 | mchp_pit64b_dt.freq = clk_rate;
| ^
>> drivers/clocksource/timer-microchip-pit64b.c:384:9: error: implicit declaration of function 'register_current_timer_delay' [-Werror=implicit-function-declaration]
384 | register_current_timer_delay(&mchp_pit64b_dt);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/clocksource/timer-microchip-pit64b.c: At top level:
>> drivers/clocksource/timer-microchip-pit64b.c:97:27: error: storage size of 'mchp_pit64b_dt' isn't known
97 | static struct delay_timer mchp_pit64b_dt;
| ^~~~~~~~~~~~~~
cc1: some warnings being treated as errors
vim +382 drivers/clocksource/timer-microchip-pit64b.c
341
342 static int __init mchp_pit64b_init_clksrc(struct mchp_pit64b_timer *timer,
343 u32 clk_rate)
344 {
345 struct mchp_pit64b_clksrc *cs;
346 int ret;
347
348 cs = kzalloc(sizeof(*cs), GFP_KERNEL);
349 if (!cs)
350 return -ENOMEM;
351
352 mchp_pit64b_reset(timer, ULLONG_MAX, MCHP_PIT64B_MR_CONT, 0);
353
354 mchp_pit64b_cs_base = timer->base;
355
356 cs->timer.base = timer->base;
357 cs->timer.pclk = timer->pclk;
358 cs->timer.gclk = timer->gclk;
359 cs->timer.mode = timer->mode;
360 cs->clksrc.name = MCHP_PIT64B_NAME;
361 cs->clksrc.mask = CLOCKSOURCE_MASK(64);
362 cs->clksrc.flags = CLOCK_SOURCE_IS_CONTINUOUS;
363 cs->clksrc.rating = 210;
364 cs->clksrc.read = mchp_pit64b_clksrc_read;
365 cs->clksrc.suspend = mchp_pit64b_clksrc_suspend;
366 cs->clksrc.resume = mchp_pit64b_clksrc_resume;
367
368 ret = clocksource_register_hz(&cs->clksrc, clk_rate);
369 if (ret) {
370 pr_debug("clksrc: Failed to register PIT64B clocksource!\n");
371
372 /* Stop timer. */
373 writel_relaxed(MCHP_PIT64B_CR_SWRST,
374 timer->base + MCHP_PIT64B_CR);
375 kfree(cs);
376
377 return ret;
378 }
379
380 sched_clock_register(mchp_pit64b_sched_read_clk, 64, clk_rate);
381
> 382 mchp_pit64b_dt.read_current_timer = mchp_pit64b_dt_read;
383 mchp_pit64b_dt.freq = clk_rate;
> 384 register_current_timer_delay(&mchp_pit64b_dt);
385
386 return 0;
387 }
388
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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