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Date: Mon, 28 Feb 2022 15:37:33 -0800 From: Dave Hansen <dave.hansen@...el.com> To: "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com> Cc: tglx@...utronix.de, mingo@...hat.com, bp@...en8.de, luto@...nel.org, peterz@...radead.org, sathyanarayanan.kuppuswamy@...ux.intel.com, aarcange@...hat.com, ak@...ux.intel.com, dan.j.williams@...el.com, david@...hat.com, hpa@...or.com, jgross@...e.com, jmattson@...gle.com, joro@...tes.org, jpoimboe@...hat.com, knsathya@...nel.org, pbonzini@...hat.com, sdeep@...are.com, seanjc@...gle.com, tony.luck@...el.com, vkuznets@...hat.com, wanpengli@...cent.com, thomas.lendacky@....com, brijesh.singh@....com, x86@...nel.org, linux-kernel@...r.kernel.org Subject: Re: [PATCHv4 10/30] x86/tdx: Handle CPUID via #VE On 2/28/22 15:31, Kirill A. Shutemov wrote: >> Does this, in practice, keep TDX guests from detecting any features that >> it supports today? > I scanned through the list of CPUID that probed via #VE during the boot > and they are related to cache/TLB hierarchy enumeration, thermal and > topology. Without cache/TLB enumeration we may miss some optimization. > Topology can be problematic, we may miss ability to communicate the > configuration, I donno. > > Shouldn't be a show-stopper. I can live with that for an initial TDX guest series. Does that bother anyone else?
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