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Message-ID: <1jv8wzw78r.fsf@starbuckisacylon.baylibre.com>
Date: Mon, 28 Feb 2022 12:36:32 +0100
From: Jerome Brunet <jbrunet@...libre.com>
To: Liang Yang <liang.yang@...ogic.com>,
Miquel Raynal <miquel.raynal@...tlin.com>,
linux-mtd@...ts.infradead.org
Cc: Rob Herring <robh+dt@...nel.org>,
Richard Weinberger <richard@....at>,
Vignesh Raghavendra <vigneshr@...com>,
Neil Armstrong <narmstrong@...libre.com>,
Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
Kevin Hilman <khilman@...libre.com>,
Jianxin Pan <jianxin.pan@...ogic.com>,
Victor Wan <victor.wan@...ogic.com>,
XianWei Zhao <xianwei.zhao@...ogic.com>,
Kelvin Zhang <kelvin.zhang@...ogic.com>,
BiChao Zheng <bichao.zheng@...ogic.com>,
YongHui Yu <yonghui.yu@...ogic.com>,
linux-arm-kernel@...ts.infradead.org,
linux-amlogic@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH RESEND v2 2/2] dt-bindings: nand: meson: refine Amlogic
NAND controller driver
On Thu 17 Feb 2022 at 14:33, Liang Yang <liang.yang@...ogic.com> wrote:
> convert txt to yaml and refine the meson NFC clock document.
>
> Signed-off-by: Liang Yang <liang.yang@...ogic.com>
> ---
> .../bindings/mtd/amlogic,meson-nand.txt | 60 ----------------
> .../bindings/mtd/amlogic,meson-nand.yaml | 70 +++++++++++++++++++
> 2 files changed, 70 insertions(+), 60 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
> create mode 100644 Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml
>
> diff --git a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
> deleted file mode 100644
> index 5794ab1147c1..000000000000
> --- a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
> +++ /dev/null
> @@ -1,60 +0,0 @@
> -Amlogic NAND Flash Controller (NFC) for GXBB/GXL/AXG family SoCs
> -
> -This file documents the properties in addition to those available in
> -the MTD NAND bindings.
> -
> -Required properties:
> -- compatible : contains one of:
> - - "amlogic,meson-gxl-nfc"
> - - "amlogic,meson-axg-nfc"
> -- clocks :
> - A list of phandle + clock-specifier pairs for the clocks listed
> - in clock-names.
> -
> -- clock-names: Should contain the following:
> - "core" - NFC module gate clock
> - "device" - device clock from eMMC sub clock controller
> - "rx" - rx clock phase
> - "tx" - tx clock phase
> -
> -- amlogic,mmc-syscon : Required for NAND clocks, it's shared with SD/eMMC
> - controller port C
> -
> -Optional children nodes:
> -Children nodes represent the available nand chips.
> -
> -Other properties:
> -see Documentation/devicetree/bindings/mtd/nand-controller.yaml for generic bindings.
> -
> -Example demonstrate on AXG SoC:
> -
> - sd_emmc_c_clkc: mmc@...0 {
> - compatible = "amlogic,meson-axg-mmc-clkc", "syscon";
> - reg = <0x0 0x7000 0x0 0x800>;
> - };
> -
> - nand-controller@...0 {
> - compatible = "amlogic,meson-axg-nfc";
> - reg = <0x0 0x7800 0x0 0x100>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
> -
> - clocks = <&clkc CLKID_SD_EMMC_C>,
> - <&sd_emmc_c_clkc CLKID_MMC_DIV>,
> - <&sd_emmc_c_clkc CLKID_MMC_PHASE_RX>,
> - <&sd_emmc_c_clkc CLKID_MMC_PHASE_TX>;
> - clock-names = "core", "device", "rx", "tx";
> - amlogic,mmc-syscon = <&sd_emmc_c_clkc>;
> -
> - pinctrl-names = "default";
> - pinctrl-0 = <&nand_pins>;
> -
> - nand@0 {
> - reg = <0>;
> - #address-cells = <1>;
> - #size-cells = <1>;
> -
> - nand-on-flash-bbt;
> - };
> - };
> diff --git a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml
> new file mode 100644
> index 000000000000..671f0a8fdc7c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml
> @@ -0,0 +1,70 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/amlogic,mmc-clkc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Amlogic NAND Flash Controller (NFC) for GXBB/GXL/AXG family SoCs
> +
> +maintainers:
> + - liang.yang@...ogic.com
> +
> +properties:
> + compatible:
> + enum:
> + - "amlogic,meson-gxl-nfc"
> + - "amlogic,meson-axg-nfc"
> +
> + reg:
> + maxItems: 2
> +
> + interrupts:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 2
> +
> + clock-names:
> + items:
> + - const: "core", "device"
> +
> + "#clock-cells":
> + const: 1
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - clocks
> + - clock-names
> + - "#clock-cells"
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + nand-controller@...0 {
> + compatible = "amlogic,meson-axg-nfc";
> + reg = <0x0 0x7800 0x0 0x100>,
> + <0x0 0x7000 0x0 0x1>;
Please name the register ressources instead of relying on the order
Also, use the actual size of region, not the size you are using in the
driver. AFAIK, the size of the 2nd region is not 0x1
> + #address-cells = <1>;
> + #size-cells = <0>;
> + interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
> +
> + clocks = <&clkc CLKID_SD_EMMC_C>,
> + <&clkc CLKID_FCLK_DIV2>;
> + clock-names = "core", "device";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&nand_pins>;
> +
> + nand@0 {
> + reg = <0>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + nand-on-flash-bbt;
> + };
> + };
> +
> +...
> \ No newline at end of file
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