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Message-ID: <d4c5b734-1a29-8359-e5fa-b53fc58dd3e5@gmail.com>
Date: Mon, 28 Feb 2022 13:20:42 +0100
From: Matthias Brugger <matthias.bgg@...il.com>
To: Yong Wu <yong.wu@...iatek.com>, Joerg Roedel <joro@...tes.org>,
Rob Herring <robh+dt@...nel.org>, Will Deacon <will@...nel.org>
Cc: Robin Murphy <robin.murphy@....com>,
Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>,
Tomasz Figa <tfiga@...omium.org>,
linux-mediatek@...ts.infradead.org, srv_heupstream@...iatek.com,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
iommu@...ts.linux-foundation.org,
Hsin-Yi Wang <hsinyi@...omium.org>, youlin.pei@...iatek.com,
anan.sun@...iatek.com, xueqi.zhang@...iatek.com,
yen-chang.chen@...iatek.com,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>,
mingyuan.ma@...iatek.com, yf.wang@...iatek.com,
libo.kang@...iatek.com, chengci.xu@...iatek.com
Subject: Re: [PATCH v2 2/2] iommu/mediatek: Add mt8186 iommu support
On 23/02/2022 08:24, Yong Wu wrote:
> Add mt8186 iommu supports.
>
> Signed-off-by: Anan Sun <anan.sun@...iatek.com>
> Signed-off-by: Yong Wu <yong.wu@...iatek.com>
Reviewed-by: Matthias Brugger <matthias.bgg@...il.com>
> ---
> drivers/iommu/mtk_iommu.c | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
>
> diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
> index d9ca9ffe404c..174a2f3bd68a 100644
> --- a/drivers/iommu/mtk_iommu.c
> +++ b/drivers/iommu/mtk_iommu.c
> @@ -160,6 +160,7 @@ enum mtk_iommu_plat {
> M4U_MT8167,
> M4U_MT8173,
> M4U_MT8183,
> + M4U_MT8186,
> M4U_MT8192,
> M4U_MT8195,
> };
> @@ -1438,6 +1439,21 @@ static const struct mtk_iommu_plat_data mt8183_data = {
> .larbid_remap = {{0}, {4}, {5}, {6}, {7}, {2}, {3}, {1}},
> };
>
> +static const struct mtk_iommu_plat_data mt8186_data_mm = {
> + .m4u_plat = M4U_MT8186,
> + .flags = HAS_BCLK | HAS_SUB_COMM_2BITS | OUT_ORDER_WR_EN |
> + WR_THROT_EN | IOVA_34_EN | NOT_STD_AXI_MODE |
> + MTK_IOMMU_TYPE_MM,
> + .larbid_remap = {{0}, {1, MTK_INVALID_LARBID, 8}, {4}, {7}, {2}, {9, 11, 19, 20},
> + {MTK_INVALID_LARBID, 14, 16},
> + {MTK_INVALID_LARBID, 13, MTK_INVALID_LARBID, 17}},
> + .inv_sel_reg = REG_MMU_INV_SEL_GEN2,
> + .banks_num = 1,
> + .banks_enable = {true},
> + .iova_region = mt8192_multi_dom,
> + .iova_region_nr = ARRAY_SIZE(mt8192_multi_dom),
> +};
> +
> static const struct mtk_iommu_plat_data mt8192_data = {
> .m4u_plat = M4U_MT8192,
> .flags = HAS_BCLK | HAS_SUB_COMM_2BITS | OUT_ORDER_WR_EN |
> @@ -1507,6 +1523,7 @@ static const struct of_device_id mtk_iommu_of_ids[] = {
> { .compatible = "mediatek,mt8167-m4u", .data = &mt8167_data},
> { .compatible = "mediatek,mt8173-m4u", .data = &mt8173_data},
> { .compatible = "mediatek,mt8183-m4u", .data = &mt8183_data},
> + { .compatible = "mediatek,mt8186-iommu-mm", .data = &mt8186_data_mm}, /* mm: m4u */
> { .compatible = "mediatek,mt8192-m4u", .data = &mt8192_data},
> { .compatible = "mediatek,mt8195-iommu-infra", .data = &mt8195_data_infra},
> { .compatible = "mediatek,mt8195-iommu-vdo", .data = &mt8195_data_vdo},
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