linux-kernel - Re: [PATCH v2 2/2] spi: fsl-spi: Implement trailing bits

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Message-ID: <YhzqbYW1q5bPNWXn@sirena.org.uk>
Date:   Mon, 28 Feb 2022 15:29:49 +0000
From:   Mark Brown <broonie@...nel.org>
To:     Christophe Leroy <christophe.leroy@...roup.eu>
Cc:     Rob Herring <robh+dt@...nel.org>, Pratyush Yadav <p.yadav@...com>,
        linux-kernel@...r.kernel.org, linux-spi@...r.kernel.org,
        devicetree@...r.kernel.org
Subject: Re: [PATCH v2 2/2] spi: fsl-spi: Implement trailing bits

On Mon, Feb 28, 2022 at 04:15:46PM +0100, Christophe Leroy wrote:

> +	if (!status && spi->trailing_bits) {
> +		struct spi_transfer t = {
> +			.len = 1,
> +			.tx_buf = empty_zero_page,
> +		};
> +
> +		if (spi->trailing_bits < 4)
> +			t.bits_per_word = 4;
> +		else if (spi->trailing_bits > 8)
> +			t.bits_per_word = 16;
> +		else
> +			t.bits_per_word = spi->trailing_bits;
> +
> +		status = fsl_spi_setup_transfer(spi, &t);
> +		if (!status)
> +			status = fsl_spi_bufs(spi, &t, 0);
> +	}
> +	m->status = status;

The binding looks good now but this is still driver specific code when
it looks like it could easily be implemented in the core - like I said
on the previous version you'd need to update drivers to advertise less
than 8 bits but there's basically nothing driver specific I can see here
so any driver using transfer_one() would get support that way.

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