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Message-ID: <58a0e791-9573-99c2-0cc5-3920a1048113@pengutronix.de>
Date: Mon, 28 Feb 2022 17:01:39 +0100
From: Ahmad Fatoum <a.fatoum@...gutronix.de>
To: Etienne Carriere <etienne.carriere@...aro.org>,
linux-kernel@...r.kernel.org
Cc: linux-arm-kernel@...ts.infradead.org,
Sudeep Holla <sudeep.holla@....com>,
Cristian Marussi <cristian.marussi@....com>,
Vincent Guittot <vincent.guittot@...aro.org>,
devicetree@...r.kernel.org, Rob Herring <robh+dt@...nel.org>,
Pengutronix Kernel Team <kernel@...gutronix.de>
Subject: Re: [PATCH v8 1/2] dt-bindings: arm: Add OP-TEE transport for SCMI
Hello Etienne,
On 28.10.21 16:00, Etienne Carriere wrote:
> Introduce compatible "linaro,scmi-optee" for SCMI transport channel
> based on an OP-TEE service invocation. The compatible mandates a
> channel ID defined with property "linaro,optee-channel-id".
I just found this thread via the compatible in the STM32MP131 patch set:
https://lore.kernel.org/all/20220225133137.813919-1-gabriel.fernandez@foss.st.com/
Linux doesn't care whether PSCI is provided by TF-A, OP-TEE or something
else, so there is just the arm,psci* compatible.
What's different about SCMI that this is not possible? Why couldn't the
existing binding and driver be used to communicate with OP-TEE as secure
monitor as well?
Cheers,
Ahmad
>
> Cc: devicetree@...r.kernel.org
> Cc: Rob Herring <robh+dt@...nel.org>
> Signed-off-by: Etienne Carriere <etienne.carriere@...aro.org>
> ---
> Changes since v6:
> - Remove maxItems from linaro,optee-channel-id description
>
> No change since v5
>
> Changes since v4:
> - Fix sram node name in DTS example: s/-shm-/-sram-/
>
> Changes since v3:
> - Add description for linaro,optee-channel-id in patternProperties
> specifying protocol can optionaly define a dedicated channel id.
> - Fix DTS example (duplicated phandles issue, subnodes ordering)
> - Fix typo in DTS example and description comments.
>
> Changes since v2:
> - Define mandatory property linaro,optee-channel-id
> - Rebased on yaml description file
>
> Changes since v1:
> - Removed modification regarding mboxes property description.
> ---
> .../bindings/firmware/arm,scmi.yaml | 65 +++++++++++++++++++
> 1 file changed, 65 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/firmware/arm,scmi.yaml b/Documentation/devicetree/bindings/firmware/arm,scmi.yaml
> index 5c4c6782e052..eae15df36eef 100644
> --- a/Documentation/devicetree/bindings/firmware/arm,scmi.yaml
> +++ b/Documentation/devicetree/bindings/firmware/arm,scmi.yaml
> @@ -38,6 +38,9 @@ properties:
> The virtio transport only supports a single device.
> items:
> - const: arm,scmi-virtio
> + - description: SCMI compliant firmware with OP-TEE transport
> + items:
> + - const: linaro,scmi-optee
>
> interrupts:
> description:
> @@ -83,6 +86,11 @@ properties:
> description:
> SMC id required when using smc or hvc transports
>
> + linaro,optee-channel-id:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description:
> + Channel specifier required when using OP-TEE transport.
> +
> protocol@11:
> type: object
> properties:
> @@ -195,6 +203,12 @@ patternProperties:
> minItems: 1
> maxItems: 2
>
> + linaro,optee-channel-id:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description:
> + Channel specifier required when using OP-TEE transport and
> + protocol has a dedicated communication channel.
> +
> required:
> - reg
>
> @@ -226,6 +240,16 @@ else:
> - arm,smc-id
> - shmem
>
> + else:
> + if:
> + properties:
> + compatible:
> + contains:
> + const: linaro,scmi-optee
> + then:
> + required:
> + - linaro,optee-channel-id
> +
> examples:
> - |
> firmware {
> @@ -340,7 +364,48 @@ examples:
> reg = <0x11>;
> #power-domain-cells = <1>;
> };
> + };
> + };
> +
> + - |
> + firmware {
> + scmi {
> + compatible = "linaro,scmi-optee";
> + linaro,optee-channel-id = <0>;
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + scmi_dvfs1: protocol@13 {
> + reg = <0x13>;
> + linaro,optee-channel-id = <1>;
> + shmem = <&cpu_optee_lpri0>;
> + #clock-cells = <1>;
> + };
> +
> + scmi_clk0: protocol@14 {
> + reg = <0x14>;
> + #clock-cells = <1>;
> + };
> + };
> + };
>
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + sram@...00000 {
> + compatible = "mmio-sram";
> + reg = <0x0 0x51000000 0x0 0x10000>;
> +
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0x0 0x51000000 0x10000>;
> +
> + cpu_optee_lpri0: optee-sram-section@0 {
> + compatible = "arm,scmi-shmem";
> + reg = <0x0 0x80>;
> + };
> };
> };
>
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