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Message-ID: <164610295187.2682974.18123746840987009597.stgit@dwillia2-desk3.amr.corp.intel.com>
Date: Mon, 28 Feb 2022 18:49:11 -0800
From: Dan Williams <dan.j.williams@...el.com>
To: gregkh@...uxfoundation.org, rafael.j.wysocki@...el.com
Cc: Alison Schofield <alison.schofield@...el.com>,
Vishal Verma <vishal.l.verma@...el.com>,
Ira Weiny <ira.weiny@...el.com>,
Ben Widawsky <ben.widawsky@...el.com>,
linux-kernel@...r.kernel.org, linux-cxl@...r.kernel.org,
nvdimm@...ts.linux.dev
Subject: [PATCH 04/11] cxl/core: Clamp max lock_class
MAX_LOCKDEP_SUBCLASSES limits the depth of the CXL topology that can be
validated by lockdep. Given that the cxl_test topology is already at
this limit collapse some of the levels and clamp the max depth.
Cc: Alison Schofield <alison.schofield@...el.com>
Cc: Vishal Verma <vishal.l.verma@...el.com>
Cc: Ira Weiny <ira.weiny@...el.com>
Cc: Ben Widawsky <ben.widawsky@...el.com>
Signed-off-by: Dan Williams <dan.j.williams@...el.com>
---
drivers/cxl/cxl.h | 21 +++++++++++++++++----
1 file changed, 17 insertions(+), 4 deletions(-)
diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
index 97e6ca7e4940..1357a245037d 100644
--- a/drivers/cxl/cxl.h
+++ b/drivers/cxl/cxl.h
@@ -501,20 +501,33 @@ enum cxl_lock_class {
CXL_ANON_LOCK,
CXL_NVDIMM_LOCK,
CXL_NVDIMM_BRIDGE_LOCK,
- CXL_PORT_LOCK,
+ CXL_PORT_LOCK = 2,
/*
* Be careful to add new lock classes here, CXL_PORT_LOCK is
* extended by the port depth, so a maximum CXL port topology
- * depth would need to be defined first.
+ * depth would need to be defined first. Also, the max
+ * validation depth is limited by MAX_LOCKDEP_SUBCLASSES.
*/
};
+static inline int clamp_lock_class(struct device *dev, int lock_class)
+{
+ if (lock_class >= MAX_LOCKDEP_SUBCLASSES) {
+ dev_warn_once(dev,
+ "depth: %d, disabling lockdep for this device\n",
+ lock_class);
+ return 0;
+ }
+
+ return lock_class;
+}
+
static inline int cxl_lock_class(struct device *dev)
{
if (is_cxl_port(dev)) {
struct cxl_port *port = to_cxl_port(dev);
- return CXL_PORT_LOCK + port->depth;
+ return clamp_lock_class(dev, CXL_PORT_LOCK + port->depth);
} else if (is_cxl_decoder(dev)) {
struct cxl_port *port = to_cxl_port(dev->parent);
@@ -522,7 +535,7 @@ static inline int cxl_lock_class(struct device *dev)
* A decoder is the immediate child of a port, so set
* its lock class equal to other child device siblings.
*/
- return CXL_PORT_LOCK + port->depth + 1;
+ return clamp_lock_class(dev, CXL_PORT_LOCK + port->depth + 1);
} else if (is_cxl_nvdimm_bridge(dev))
return CXL_NVDIMM_BRIDGE_LOCK;
else if (is_cxl_nvdimm(dev))
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