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Message-ID: <CAH=2Ntz837KwreQX4JBf1E6J0SWnV0v-YqtRAn2nU-Dse+f3Gw@mail.gmail.com>
Date:   Wed, 2 Mar 2022 01:01:47 +0530
From:   Bhupesh Sharma <bhupesh.sharma@...aro.org>
To:     Bjorn Andersson <bjorn.andersson@...aro.org>
Cc:     linux-arm-msm@...r.kernel.org, bhupesh.linux@...il.com,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        robh+dt@...nel.org, agross@...nel.org, sboyd@...nel.org,
        tdas@...eaurora.org, mturquette@...libre.com,
        linux-clk@...r.kernel.org, davem@...emloft.net,
        netdev@...r.kernel.org, Vinod Koul <vkoul@...nel.org>
Subject: Re: [PATCH 2/8] net: stmmac: Add support for SM8150

Hi Bjorn,

Sorry for the late reply.

On Tue, 1 Feb 2022 at 05:37, Bjorn Andersson <bjorn.andersson@...aro.org> wrote:
>
> On Wed 26 Jan 16:17 CST 2022, Bhupesh Sharma wrote:
>
> > From: Vinod Koul <vkoul@...nel.org>
> >
> > This adds compatible, POR config & driver data for ethernet controller
> > found in SM8150 SoC.
> >
> > Cc: David S. Miller <davem@...emloft.net>
> > Signed-off-by: Vinod Koul <vkoul@...nel.org>
> > [bhsharma: Massage the commit log and other cosmetic changes]
> > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@...aro.org>
>
> The series can be picked up by 3 different maintainers and e.g. the
> network patches seems ready to be merged.
>
> Please facilitate this by sending it in 3 different series (you may
> combine clock and dts in one series, as I merge both).

Sure, I will send 3 different series in v2.

Regards,
Bhupesh

> > ---
> >  .../ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c   | 15 +++++++++++++++
> >  1 file changed, 15 insertions(+)
> >
> > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
> > index 2ffa0a11eea5..8cdba9d521ec 100644
> > --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
> > +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
> > @@ -183,6 +183,20 @@ static const struct ethqos_emac_driver_data emac_v2_3_0_data = {
> >       .num_por = ARRAY_SIZE(emac_v2_3_0_por),
> >  };
> >
> > +static const struct ethqos_emac_por emac_v2_1_0_por[] = {
> > +     { .offset = RGMII_IO_MACRO_CONFIG,      .value = 0x40C01343 },
> > +     { .offset = SDCC_HC_REG_DLL_CONFIG,     .value = 0x2004642C },
> > +     { .offset = SDCC_HC_REG_DDR_CONFIG,     .value = 0x00000000 },
> > +     { .offset = SDCC_HC_REG_DLL_CONFIG2,    .value = 0x00200000 },
> > +     { .offset = SDCC_USR_CTL,               .value = 0x00010800 },
> > +     { .offset = RGMII_IO_MACRO_CONFIG2,     .value = 0x00002060 },
> > +};
> > +
> > +static const struct ethqos_emac_driver_data emac_v2_1_0_data = {
> > +     .por = emac_v2_1_0_por,
> > +     .num_por = ARRAY_SIZE(emac_v2_1_0_por),
> > +};
> > +
> >  static int ethqos_dll_configure(struct qcom_ethqos *ethqos)
> >  {
> >       unsigned int val;
> > @@ -558,6 +572,7 @@ static int qcom_ethqos_remove(struct platform_device *pdev)
> >
> >  static const struct of_device_id qcom_ethqos_match[] = {
> >       { .compatible = "qcom,qcs404-ethqos", .data = &emac_v2_3_0_data},
> > +     { .compatible = "qcom,sm8150-ethqos", .data = &emac_v2_1_0_data},
> >       { }
> >  };
> >  MODULE_DEVICE_TABLE(of, qcom_ethqos_match);
> > --
> > 2.34.1
> >

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