linux-kernel - [PATCH v2 3/7] clk: qcom: gcc: Add PCIE_0_GDSC and PCIE_1

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Date:   Tue,  1 Mar 2022 12:55:07 +0530
From:   Bhupesh Sharma <bhupesh.sharma@...aro.org>
To:     linux-arm-msm@...r.kernel.org, linux-pci@...r.kernel.org,
        devicetree@...r.kernel.org
Cc:     bhupesh.sharma@...aro.org, bhupesh.linux@...il.com,
        lorenzo.pieralisi@....com, agross@...nel.org,
        bjorn.andersson@...aro.org, svarbanov@...sol.com,
        bhelgaas@...gle.com, linux-kernel@...r.kernel.org,
        robh+dt@...nel.org, sboyd@...nel.org, mturquette@...libre.com,
        linux-clk@...r.kernel.org
Subject: [PATCH v2 3/7] clk: qcom: gcc: Add PCIE_0_GDSC and PCIE_1_GDSC for SM8150

Add the PCIE_0_GDSC and PCIE_1_GDSC defines for SM8150,
so that dts files can use the same.

Cc: Stephen Boyd <sboyd@...nel.org>
Cc: Bjorn Andersson <bjorn.andersson@...aro.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@...aro.org>
---
 include/dt-bindings/clock/qcom,gcc-sm8150.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/dt-bindings/clock/qcom,gcc-sm8150.h b/include/dt-bindings/clock/qcom,gcc-sm8150.h
index 3e1a91876610..ae9c16410420 100644
--- a/include/dt-bindings/clock/qcom,gcc-sm8150.h
+++ b/include/dt-bindings/clock/qcom,gcc-sm8150.h
@@ -241,6 +241,8 @@
 #define GCC_USB_PHY_CFG_AHB2PHY_BCR				28
 
 /* GCC GDSCRs */
+#define PCIE_0_GDSC						0
+#define PCIE_1_GDSC						1
 #define USB30_PRIM_GDSC                     4
 #define USB30_SEC_GDSC						5
 
-- 
2.35.1