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Message-ID: <CAD=FV=Xm7UVXX9NQfKs+BymsZpG+aoYqvXXRL5WhJjEZRqi7ug@mail.gmail.com>
Date: Mon, 28 Feb 2022 17:10:12 -0800
From: Doug Anderson <dianders@...omium.org>
To: Srinivasa Rao Mandadapu <quic_srivasam@...cinc.com>
Cc: Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
linux-arm-msm <linux-arm-msm@...r.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>, LKML <linux-kernel@...r.kernel.org>,
Rohit kumar <rohitkr@...eaurora.org>,
Srinivas Kandagatla <srinivas.kandagatla@...aro.org>,
Stephen Boyd <swboyd@...omium.org>,
Judy Hsiao <judyhsiao@...omium.org>,
Venkata Prasad Potturu <quic_potturu@...cinc.com>
Subject: Re: [PATCH v4 2/3] arm64: dts: qcom: sc7280: Add lpass cpu node
Hi,
On Fri, Feb 11, 2022 at 6:57 AM Srinivasa Rao Mandadapu
<quic_srivasam@...cinc.com> wrote:
>
> @@ -1750,6 +1751,64 @@
> #clock-cells = <1>;
> };
>
> + lpass_cpu: audio-subsystem@...0000 {
> + compatible = "qcom,sc7280-lpass-cpu";
> + reg = <0 0x3260000 0 0xC000>,
> + <0 0x3280000 0 0x29000>,
> + <0 0x3340000 0 0x29000>,
> + <0 0x336C000 0 0x3000>,
> + <0 0x3987000 0 0x68000>,
> + <0 0x3B00000 0 0x29000>;
Lower case hex, please. ...and pad the address to 8 digits here (just
don't do it in the unit address in the node name).
> + reg-names = "lpass-rxtx-cdc-dma-lpm",
> + "lpass-rxtx-lpaif",
> + "lpass-va-lpaif",
> + "lpass-va-cdc-dma-lpm",
> + "lpass-hdmiif",
> + "lpass-lpaif";
The order of "reg" and "reg-names" needs to match the bindings
exactly. It's almost certainly easier to change your device tree since
the bindings have already landed.
That means that "lpass-hdmiif" will be first. ...and it will also
change your node name since the first "reg" listed will now be
3987000.
> + iommus = <&apps_smmu 0x1820 0>,
> + <&apps_smmu 0x1821 0>,
> + <&apps_smmu 0x1832 0>;
> + status = "disabled";
> +
> + power-domains = <&rpmhpd SC7280_LCX>;
> + power-domain-names = "lcx";
power-domain-names is not in the bindings.
> + required-opps = <&rpmhpd_opp_nom>;
> +
> + clocks = <&lpass_aon LPASS_AON_CC_AUDIO_HM_H_CLK>,
> + <&lpasscore LPASS_CORE_CC_SYSNOC_MPORT_CORE_CLK>,
> + <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM_CLK>,
> + <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM0_CLK>,
> + <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM1_CLK>,
> + <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM2_CLK>,
> + <&lpasscore LPASS_CORE_CC_EXT_IF0_IBIT_CLK>,
> + <&lpasscore LPASS_CORE_CC_EXT_IF1_IBIT_CLK>,
> + <&lpass_aon LPASS_AON_CC_VA_MEM0_CLK>;
> + clock-names = "aon_cc_audio_hm_h",
> + "core_cc_sysnoc_mport_core",
> + "audio_cc_codec_mem",
> + "audio_cc_codec_mem0",
> + "audio_cc_codec_mem1",
> + "audio_cc_codec_mem2",
> + "core_cc_ext_if0_ibit",
> + "core_cc_ext_if1_ibit",
> + "aon_cc_va_mem0";
Clocks do not match bindings.
> + #sound-dai-cells = <1>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> +
> + interrupt-names = "lpass-irq-lpaif",
> + "lpass-irq-vaif",
> + "lpass-irq-rxtxif",
> + "lpass-irq-hdmi";
interrupt-names ordering does not match bindings.
-Doug
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