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Message-ID: <4b35e465-626a-7218-ed9a-4e5cf28c1ccc@intel.com>
Date: Tue, 1 Mar 2022 12:05:17 +0200
From: Adrian Hunter <adrian.hunter@...el.com>
To: Ulf Hansson <ulf.hansson@...aro.org>,
Ben Chuang <benchuanggli@...il.com>
Cc: linux-mmc@...r.kernel.org, linux-kernel@...r.kernel.org,
greg.tu@...esyslogic.com.tw, ben.chuang@...esyslogic.com.tw,
SeanHY.Chen@...esyslogic.com.tw,
Kevin Chang <kevin.chang@...uturecenter.com>
Subject: Re: [PATCH] mmc: sdhci-pci-gli: Add runtime PM for GL9763E
On 28/02/2022 19:03, Ulf Hansson wrote:
> On Fri, 25 Feb 2022 at 13:56, Ben Chuang <benchuanggli@...il.com> wrote:
>>
>> From: Ben Chuang <ben.chuang@...esyslogic.com.tw>
>>
>> Add runtime PM for GL9763E and disable PLL in runtime suspend. So power
>> gated of upstream port can be enabled.
>>
>> Signed-off-by: Ben Chuang <ben.chuang@...esyslogic.com.tw>
>> Tested-by: Kevin Chang <kevin.chang@...uturecenter.com>
>> ---
>> drivers/mmc/host/sdhci-pci-gli.c | 54 ++++++++++++++++++++++++++++++++
>> 1 file changed, 54 insertions(+)
>>
>> diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c
>> index 97035d77c18c..cf99b6af792d 100644
>> --- a/drivers/mmc/host/sdhci-pci-gli.c
>> +++ b/drivers/mmc/host/sdhci-pci-gli.c
>> @@ -873,6 +873,55 @@ static void gli_set_gl9763e(struct sdhci_pci_slot *slot)
>> pci_write_config_dword(pdev, PCIE_GLI_9763E_VHS, value);
>> }
>>
>> +#ifdef CONFIG_PM
>> +static int gl9763e_runtime_suspend(struct sdhci_pci_chip *chip)
>> +{
>> + struct sdhci_pci_slot *slot = chip->slots[0];
>> + struct sdhci_host *host = slot->host;
>> + u16 clock;
>> +
>> + clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
>> + clock &= ~(SDHCI_CLOCK_PLL_EN | SDHCI_CLOCK_CARD_EN);
>> + sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL);
>> +
>> + return 0;
>> +}
>> +
>> +static int gl9763e_runtime_resume(struct sdhci_pci_chip *chip)
>> +{
>> + struct sdhci_pci_slot *slot = chip->slots[0];
>> + struct sdhci_host *host = slot->host;
>> + ktime_t timeout;
>> + u16 clock;
>> +
>> + clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
>> +
>> + clock |= SDHCI_CLOCK_PLL_EN;
>> + clock &= ~SDHCI_CLOCK_INT_STABLE;
>> + sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL);
>> +
>> + timeout = ktime_add_ms(ktime_get(), 150);
>> + while (1) {
>> + bool timedout = ktime_after(ktime_get(), timeout);
>> +
>> + clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
>> + if (clock & SDHCI_CLOCK_INT_STABLE)
>> + break;
>> + if (timedout) {
>> + pr_err("%s: PLL clock never stabilised.\n",
>> + mmc_hostname(host->mmc));
>> + sdhci_dumpregs(host);
>> + break;
>> + }
>> + udelay(10);
>> + }
Could use something like read_poll_timeout() here e.g.
if (read_poll_timeout(sdhci_readw, clk, (clk & SDHCI_CLOCK_INT_STABLE),
1000, 150000, false, host, SDHCI_CLOCK_CONTROL)) {
pr_err("%s: PLL clock never stabilised.\n",
mmc_hostname(host->mmc));
sdhci_dumpregs(host);
}
>> + clock |= SDHCI_CLOCK_CARD_EN;
>> + sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL);
>> +
>> + return 0;
>> +}
>
> Both functions above look very similar to what sdhci_set_clock() does.
> Can you use that, rather than open coding the above?
>
> Other than that, I would appreciate it if Adrian could have a look at
> this too. For example, I wonder if perhaps
> sdhci_runtime_suspend|resume_host() should be called in these paths
> too.
Assuming the host controller does not lose state information, it should be fine.
>
>> +#endif
>> +
>> static int gli_probe_slot_gl9763e(struct sdhci_pci_slot *slot)
>> {
>> struct pci_dev *pdev = slot->chip->pdev;
>> @@ -982,6 +1031,11 @@ const struct sdhci_pci_fixes sdhci_gl9763e = {
>> #ifdef CONFIG_PM_SLEEP
>> .resume = sdhci_cqhci_gli_resume,
>> .suspend = sdhci_cqhci_gli_suspend,
>> +#endif
>> +#ifdef CONFIG_PM
>> + .runtime_suspend = gl9763e_runtime_suspend,
>> + .runtime_resume = gl9763e_runtime_resume,
>> + .allow_runtime_pm = true,
>> #endif
>> .add_host = gl9763e_add_host,
>> };
>> --
>> 2.35.1
>>
>
> Kind regards
> Uffe
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