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Message-ID: <Yh4evlYQXru8c++N@sirena.org.uk>
Date:   Tue, 1 Mar 2022 13:25:18 +0000
From:   Mark Brown <broonie@...nel.org>
To:     Christophe Leroy <christophe.leroy@...roup.eu>
Cc:     Rob Herring <robh+dt@...nel.org>, Pratyush Yadav <p.yadav@...com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-spi@...r.kernel.org" <linux-spi@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
Subject: Re: [PATCH v2 2/2] spi: fsl-spi: Implement trailing bits

On Tue, Mar 01, 2022 at 12:53:58PM +0000, Christophe Leroy wrote:

> My understanding today is that this trailing transfer with chipselect 
> OFF is to be added at the end of transfer_one_message().

Yes.

> It can be implemented in the core transfer_one_message() for drivers 
> implementing transfer_one(). For the other drivers not having 
> transfer_one() but having transfer_one_message(), it must be implemented 
> in the driver's transfer_one_message().

> Am I right ?

Yes.

> fsl-spi driver is the one I need to support this new functionnality and 
> it has its own transfer_one_message().

> What would you expect ?

Well, if the fsl-spi driver has a good reason for open coding
transfer_message() it could continue to do it, however looking at the
driver it seems like it's only the little bit at the start to optimise
the trasfer width in CPU mode which looks like it could easily be moved
to a prepare_message() callback and save a bunch of code so it'd be good
to convert it.  I guess it shouldn't be strictly essential though.

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