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Message-Id: <20220302173114.927476-3-clg@kaod.org> Date: Wed, 2 Mar 2022 18:31:06 +0100 From: Cédric Le Goater <clg@...d.org> To: linux-spi@...r.kernel.org, linux-mtd@...ts.infradead.org Cc: Mark Brown <broonie@...nel.org>, Tudor Ambarus <tudor.ambarus@...rochip.com>, Pratyush Yadav <p.yadav@...com>, Miquel Raynal <miquel.raynal@...tlin.com>, Richard Weinberger <richard@....at>, Vignesh Raghavendra <vigneshr@...com>, linux-aspeed@...ts.ozlabs.org, Joel Stanley <joel@....id.au>, Andrew Jeffery <andrew@...id.au>, Chin-Ting Kuo <chin-ting_kuo@...eedtech.com>, devicetree@...r.kernel.org, Rob Herring <robh+dt@...nel.org>, linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org, Cédric Le Goater <clg@...d.org> Subject: [PATCH v2 02/10] ARM: dts: aspeed: Adjust "reg" property of FMC/SPI controllers This is compatible with the current driver and addresses issues when running 'make dt_binding_check'. Cc: Chin-Ting Kuo <chin-ting_kuo@...eedtech.com> Signed-off-by: Cédric Le Goater <clg@...d.org> --- arch/arm/boot/dts/aspeed-g4.dtsi | 6 ++---- arch/arm/boot/dts/aspeed-g5.dtsi | 9 +++------ arch/arm/boot/dts/aspeed-g6.dtsi | 9 +++------ 3 files changed, 8 insertions(+), 16 deletions(-) diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi index f14dace34c5a..9ae67e83cf60 100644 --- a/arch/arm/boot/dts/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed-g4.dtsi @@ -54,8 +54,7 @@ ahb { ranges; fmc: spi@...20000 { - reg = < 0x1e620000 0x94 - 0x20000000 0x10000000 >; + reg = <0x1e620000 0x94>, <0x20000000 0x10000000>; #address-cells = <1>; #size-cells = <0>; compatible = "aspeed,ast2400-fmc"; @@ -91,8 +90,7 @@ flash@4 { }; spi: spi@...30000 { - reg = < 0x1e630000 0x18 - 0x30000000 0x10000000 >; + reg = <0x1e630000 0x18>, <0x30000000 0x10000000>; #address-cells = <1>; #size-cells = <0>; compatible = "aspeed,ast2400-spi"; diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index 7495f93c5069..c3e0a8e13c8a 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -55,8 +55,7 @@ ahb { ranges; fmc: spi@...20000 { - reg = < 0x1e620000 0xc4 - 0x20000000 0x10000000 >; + reg = <0x1e620000 0xc4>, <0x20000000 0x10000000>; #address-cells = <1>; #size-cells = <0>; compatible = "aspeed,ast2500-fmc"; @@ -84,8 +83,7 @@ flash@2 { }; spi1: spi@...30000 { - reg = < 0x1e630000 0xc4 - 0x30000000 0x08000000 >; + reg = <0x1e630000 0xc4>, <0x30000000 0x08000000>; #address-cells = <1>; #size-cells = <0>; compatible = "aspeed,ast2500-spi"; @@ -106,8 +104,7 @@ flash@1 { }; spi2: spi@...31000 { - reg = < 0x1e631000 0xc4 - 0x38000000 0x08000000 >; + reg = <0x1e631000 0xc4>, <0x38000000 0x08000000>; #address-cells = <1>; #size-cells = <0>; compatible = "aspeed,ast2500-spi"; diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi index c32e87fad4dc..1ad05dde19d2 100644 --- a/arch/arm/boot/dts/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed-g6.dtsi @@ -95,8 +95,7 @@ gic: interrupt-controller@...61000 { }; fmc: spi@...20000 { - reg = < 0x1e620000 0xc4 - 0x20000000 0x10000000 >; + reg = <0x1e620000 0xc4>, <0x20000000 0x10000000>; #address-cells = <1>; #size-cells = <0>; compatible = "aspeed,ast2600-fmc"; @@ -124,8 +123,7 @@ flash@2 { }; spi1: spi@...30000 { - reg = < 0x1e630000 0xc4 - 0x30000000 0x10000000 >; + reg = <0x1e630000 0xc4>, <0x30000000 0x10000000>; #address-cells = <1>; #size-cells = <0>; compatible = "aspeed,ast2600-spi"; @@ -146,8 +144,7 @@ flash@1 { }; spi2: spi@...31000 { - reg = < 0x1e631000 0xc4 - 0x50000000 0x10000000 >; + reg = <0x1e631000 0xc4>, <0x50000000 0x10000000>; #address-cells = <1>; #size-cells = <0>; compatible = "aspeed,ast2600-spi"; -- 2.34.1
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