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Message-ID: <6e3bcece-1046-0c2f-78d8-21d5030a8d71@huawei.com>
Date: Wed, 2 Mar 2022 18:48:24 +0000
From: John Garry <john.garry@...wei.com>
To: Shameer Kolothum <shameerali.kolothum.thodi@...wei.com>,
<kvm@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-crypto@...r.kernel.org>
CC: <linux-pci@...r.kernel.org>, <alex.williamson@...hat.com>,
<jgg@...dia.com>, <cohuck@...hat.com>, <mgurtovoy@...dia.com>,
<yishaih@...dia.com>, <linuxarm@...wei.com>,
<liulongfang@...wei.com>, <prime.zeng@...ilicon.com>,
<jonathan.cameron@...wei.com>, <wangzhou1@...ilicon.com>
Subject: Re: [PATCH v7 01/10] crypto: hisilicon/qm: Move the QM header to
include/linux
On 02/03/2022 17:28, Shameer Kolothum wrote:
> Since we are going to introduce VFIO PCI HiSilicon ACC
> driver for live migration in subsequent patches, move
> the ACC QM header file to a common include dir.
>
> Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@...wei.com>
> ---
> drivers/crypto/hisilicon/hpre/hpre.h | 2 +-
> drivers/crypto/hisilicon/qm.c | 2 +-
> drivers/crypto/hisilicon/sec2/sec.h | 2 +-
> drivers/crypto/hisilicon/sgl.c | 2 +-
> drivers/crypto/hisilicon/zip/zip.h | 2 +-
> drivers/crypto/hisilicon/qm.h => include/linux/hisi_acc_qm.h | 0
include/linux/crypto seems a better location. I'm not sure if someone
suggested a location already, though.
> 6 files changed, 5 insertions(+), 5 deletions(-)
> rename drivers/crypto/hisilicon/qm.h => include/linux/hisi_acc_qm.h (100%)
>
> diff --git a/drivers/crypto/hisilicon/hpre/hpre.h b/drivers/crypto/hisilicon/hpre/hpre.h
> index e0b4a1982ee9..9a0558ed82f9 100644
> --- a/drivers/crypto/hisilicon/hpre/hpre.h
> +++ b/drivers/crypto/hisilicon/hpre/hpre.h
> @@ -4,7 +4,7 @@
> #define __HISI_HPRE_H
>
> #include <linux/list.h>
> -#include "../qm.h"
> +#include <linux/hisi_acc_qm.h>
>
> #define HPRE_SQE_SIZE sizeof(struct hpre_sqe)
> #define HPRE_PF_DEF_Q_NUM 64
> diff --git a/drivers/crypto/hisilicon/qm.c b/drivers/crypto/hisilicon/qm.c
> index c5b84a5ea350..ed23e1d3fa27 100644
> --- a/drivers/crypto/hisilicon/qm.c
> +++ b/drivers/crypto/hisilicon/qm.c
> @@ -15,7 +15,7 @@
> #include <linux/uacce.h>
> #include <linux/uaccess.h>
> #include <uapi/misc/uacce/hisi_qm.h>
> -#include "qm.h"
> +#include <linux/hisi_acc_qm.h>
>
> /* eq/aeq irq enable */
> #define QM_VF_AEQ_INT_SOURCE 0x0
> diff --git a/drivers/crypto/hisilicon/sec2/sec.h b/drivers/crypto/hisilicon/sec2/sec.h
> index d97cf02b1df7..c2e9b01187a7 100644
> --- a/drivers/crypto/hisilicon/sec2/sec.h
> +++ b/drivers/crypto/hisilicon/sec2/sec.h
> @@ -4,7 +4,7 @@
> #ifndef __HISI_SEC_V2_H
> #define __HISI_SEC_V2_H
>
> -#include "../qm.h"
> +#include <linux/hisi_acc_qm.h>
> #include "sec_crypto.h"
>
> /* Algorithm resource per hardware SEC queue */
> diff --git a/drivers/crypto/hisilicon/sgl.c b/drivers/crypto/hisilicon/sgl.c
> index 057273769f26..534687401135 100644
> --- a/drivers/crypto/hisilicon/sgl.c
> +++ b/drivers/crypto/hisilicon/sgl.c
> @@ -3,7 +3,7 @@
> #include <linux/dma-mapping.h>
> #include <linux/module.h>
> #include <linux/slab.h>
> -#include "qm.h"
> +#include <linux/hisi_acc_qm.h>
alphabetic ordering (ignoring previous point)?
>
> #define HISI_ACC_SGL_SGE_NR_MIN 1
> #define HISI_ACC_SGL_NR_MAX 256
> diff --git a/drivers/crypto/hisilicon/zip/zip.h b/drivers/crypto/hisilicon/zip/zip.h
> index 517fdbdff3ea..3dfd3bac5a33 100644
> --- a/drivers/crypto/hisilicon/zip/zip.h
> +++ b/drivers/crypto/hisilicon/zip/zip.h
> @@ -7,7 +7,7 @@
> #define pr_fmt(fmt) "hisi_zip: " fmt
>
> #include <linux/list.h>
> -#include "../qm.h"
> +#include <linux/hisi_acc_qm.h>
>
> enum hisi_zip_error_type {
> /* negative compression */
> diff --git a/drivers/crypto/hisilicon/qm.h b/include/linux/hisi_acc_qm.h
> similarity index 100%
> rename from drivers/crypto/hisilicon/qm.h
> rename to include/linux/hisi_acc_qm.h
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