| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-Id: <20220302190938.6195-2-krzysztof.kozlowski@canonical.com>
Date: Wed, 2 Mar 2022 20:09:37 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
To: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>,
linux-usb@...r.kernel.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org
Cc: Rob Herring <robh@...nel.org>
Subject: [PATCH v2 1/2] dt-bindings: usb: samsung,exynos-dwc3: convert to dtschema
Convert the Samsung Exynos SoC USB 3.0 DWC3 Controller bindings to DT
schema format.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
Reviewed-by: Rob Herring <robh@...nel.org>
---
.../devicetree/bindings/usb/exynos-usb.txt | 49 -------
.../bindings/usb/samsung,exynos-dwc3.yaml | 129 ++++++++++++++++++
2 files changed, 129 insertions(+), 49 deletions(-)
create mode 100644 Documentation/devicetree/bindings/usb/samsung,exynos-dwc3.yaml
diff --git a/Documentation/devicetree/bindings/usb/exynos-usb.txt b/Documentation/devicetree/bindings/usb/exynos-usb.txt
index f7ae79825d7d..61c03c0ef19f 100644
--- a/Documentation/devicetree/bindings/usb/exynos-usb.txt
+++ b/Documentation/devicetree/bindings/usb/exynos-usb.txt
@@ -64,52 +64,3 @@ Example:
phys = <&usb2phy 1>;
phy-names = "host";
};
-
-DWC3
-Required properties:
- - compatible: should be one of the following -
- "samsung,exynos5250-dwusb3": for USB 3.0 DWC3 controller on
- Exynos5250/5420.
- "samsung,exynos5433-dwusb3": for USB 3.0 DWC3 controller on
- Exynos5433.
- "samsung,exynos7-dwusb3": for USB 3.0 DWC3 controller on Exynos7.
- - #address-cells, #size-cells : should be '1' if the device has sub-nodes
- with 'reg' property.
- - ranges: allows valid 1:1 translation between child's address space and
- parent's address space
- - clocks: Clock IDs array as required by the controller.
- - clock-names: Names of clocks corresponding to IDs in the clock property.
- Following clock names shall be provided for different
- compatibles:
- - samsung,exynos5250-dwusb3: "usbdrd30",
- - samsung,exynos5433-dwusb3: "aclk", "susp_clk", "pipe_pclk",
- "phyclk",
- - samsung,exynos7-dwusb3: "usbdrd30", "usbdrd30_susp_clk",
- "usbdrd30_axius_clk"
- - vdd10-supply: 1.0V powr supply
- - vdd33-supply: 3.0V/3.3V power supply
-
-Sub-nodes:
-The dwc3 core should be added as subnode to Exynos dwc3 glue.
-- dwc3 :
- The binding details of dwc3 can be found in:
- Documentation/devicetree/bindings/usb/snps,dwc3.yaml
-
-Example:
- usb@...00000 {
- compatible = "samsung,exynos5250-dwusb3";
- clocks = <&clock 286>;
- clock-names = "usbdrd30";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- vdd10-supply = <&ldo11_reg>;
- vdd33-supply = <&ldo9_reg>;
-
- dwc3 {
- compatible = "synopsys,dwc3";
- reg = <0x12000000 0x10000>;
- interrupts = <0 72 0>;
- usb-phy = <&usb2_phy &usb3_phy>;
- };
- };
diff --git a/Documentation/devicetree/bindings/usb/samsung,exynos-dwc3.yaml b/Documentation/devicetree/bindings/usb/samsung,exynos-dwc3.yaml
new file mode 100644
index 000000000000..22b91a27d776
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/samsung,exynos-dwc3.yaml
@@ -0,0 +1,129 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/samsung,exynos-dwc3.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Samsung Exynos SoC USB 3.0 DWC3 Controller
+
+maintainers:
+ - Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
+
+properties:
+ compatible:
+ enum:
+ - samsung,exynos5250-dwusb3
+ - samsung,exynos5433-dwusb3
+ - samsung,exynos7-dwusb3
+
+ '#address-cells':
+ const: 1
+
+ clocks:
+ minItems: 1
+ maxItems: 4
+
+ clock-names:
+ minItems: 1
+ maxItems: 4
+
+ ranges: true
+
+ '#size-cells':
+ const: 1
+
+ vdd10-supply:
+ description: 1.0V power supply
+
+ vdd33-supply:
+ description: 3.0V/3.3V power supply
+
+patternProperties:
+ "^usb@[0-9a-f]+$":
+ $ref: snps,dwc3.yaml#
+ description: Required child node
+
+required:
+ - compatible
+ - '#address-cells'
+ - clocks
+ - clock-names
+ - ranges
+ - '#size-cells'
+ - vdd10-supply
+ - vdd33-supply
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: samsung,exynos5250-dwusb3
+ then:
+ properties:
+ clocks:
+ minItems: 1
+ maxItems: 1
+ clock-names:
+ items:
+ - const: usbdrd30
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: samsung,exynos54333-dwusb3
+ then:
+ properties:
+ clocks:
+ minItems: 4
+ maxItems: 4
+ clock-names:
+ items:
+ - const: aclk
+ - const: susp_clk
+ - const: pipe_pclk
+ - const: phyclk
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: samsung,exynos7-dwusb3
+ then:
+ properties:
+ clocks:
+ minItems: 3
+ maxItems: 3
+ clock-names:
+ items:
+ - const: usbdrd30
+ - const: usbdrd30_susp_clk
+ - const: usbdrd30_axius_clk
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/exynos5420.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ usb {
+ compatible = "samsung,exynos5250-dwusb3";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ clocks = <&clock CLK_USBD300>;
+ clock-names = "usbdrd30";
+ vdd33-supply = <&ldo9_reg>;
+ vdd10-supply = <&ldo11_reg>;
+
+ usb@...00000 {
+ compatible = "snps,dwc3";
+ reg = <0x12000000 0x10000>;
+ interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+ phys = <&usbdrd_phy0 0>, <&usbdrd_phy0 1>;
+ phy-names = "usb2-phy", "usb3-phy";
+ snps,dis_u3_susphy_quirk;
+ };
+ };
--
2.32.0
Powered by blists - more mailing lists