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Message-ID: <269ceab6-170f-82e5-f9fc-d3fafba60fba@intel.com>
Date: Tue, 1 Mar 2022 17:02:14 -0800
From: "Joseph, Jithu" <jithu.joseph@...el.com>
To: Steven Rostedt <rostedt@...dmis.org>
CC: <hdegoede@...hat.com>, <markgross@...nel.org>,
<tglx@...utronix.de>, <mingo@...hat.com>, <bp@...en8.de>,
<dave.hansen@...ux.intel.com>, <x86@...nel.org>, <hpa@...or.com>,
<corbet@....net>, <gregkh@...uxfoundation.org>,
<andriy.shevchenko@...ux.intel.com>, <ashok.raj@...el.com>,
<tony.luck@...el.com>, <linux-kernel@...r.kernel.org>,
<linux-doc@...r.kernel.org>, <platform-driver-x86@...r.kernel.org>,
<patches@...ts.linux.dev>, <ravi.v.shankar@...el.com>
Subject: Re: [RFC 10/10] trace: platform/x86/intel/ifs: Add trace point to
track Intel IFS operations
On 3/1/2022 12:17 PM, Steven Rostedt wrote:
> On Tue, 1 Mar 2022 11:54:57 -0800
> Jithu Joseph <jithu.joseph@...el.com> wrote:
>
>> + TP_STRUCT__entry(
>> + __field( u8, start )
>> + __field( u8, stop )
>> + __field( u64, status )
>> + ),
>
> I'd suggest swapping this to:
>
> __field( u64, status )
> __field( u8, start )
> __field( u8, stop )
>
> As trace events are usually aligned by 4 bytes (sometimes 8 for archs that
> require 8byte alignment for 8 byte words), but any event, putting the
> padding at the end of the event is better than in the middle of the event.
>
> Having the u64 come after two u8 (two byes) will pretty much guarantee a 6
> bytes hole in the middle of the event.
Will reorder the fields as you suggested. Appreciate the detailed comment.
Jithu
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