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Date: Thu, 3 Mar 2022 14:19:39 -0800
From: Stephen Boyd <swboyd@...omium.org>
To: Vinod Polimera <quic_vpolimer@...cinc.com>,
devicetree@...r.kernel.org, dri-devel@...ts.freedesktop.org,
freedreno@...ts.freedesktop.org, linux-arm-msm@...r.kernel.org
Cc: linux-kernel@...r.kernel.org, robdclark@...il.com,
dianders@...omium.org, quic_kalyant@...cinc.com
Subject: Re: [PATCH v2] drm/msm/disp/dpu1: add inline rotation support for
sc7280 target
Quoting Vinod Polimera (2022-03-03 03:42:59)
> - Some DPU versions support inline rot90. It is supported only for
> limited amount of UBWC formats.
> - There are two versions of inline rotators, v1 (present on sm8250 and
> sm7250) and v2 (sc7280). These versions differ in the list of supported
> formats and in the scaler possibilities.
>
> Changes in RFC:
> - Rebase changes to the latest code base.
> - Append rotation config variables with v2 and
> remove unused variables.(Dmitry)
> - Move pixel_ext setup separately from scaler3 config.(Dmitry)
> - Add 270 degree rotation to supported rotation list.(Dmitry)
>
> Changes in V2:
> - Remove unused macros and fix indentation.
> - Add check if 90 rotation is supported and add supported rotations to rot_cfg.
>
> Signed-off-by: Kalyan Thota <quic_kalyant@...cinc.com>
Missing a Co-developed-by tag here?
> Signed-off-by: Vinod Polimera <quic_vpolimer@...cinc.com>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 44 +++++++---
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 17 ++++
> drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 108 +++++++++++++++++++------
> drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h | 2 +
> 4 files changed, 134 insertions(+), 37 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> index aa75991..7cd07be 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> @@ -25,6 +25,9 @@
> #define VIG_SM8250_MASK \
> (VIG_MASK | BIT(DPU_SSPP_QOS_8LVL) | BIT(DPU_SSPP_SCALER_QSEED3LITE))
>
> +#define VIG_SC7280_MASK \
> + (VIG_SC7180_MASK | BIT(DPU_SSPP_INLINE_ROTATION))
> +
> #define DMA_SDM845_MASK \
> (BIT(DPU_SSPP_SRC) | BIT(DPU_SSPP_QOS) | BIT(DPU_SSPP_QOS_8LVL) |\
> BIT(DPU_SSPP_TS_PREFILL) | BIT(DPU_SSPP_TS_PREFILL_REC1) |\
> @@ -177,6 +180,11 @@ static const uint32_t plane_formats_yuv[] = {
> DRM_FORMAT_YVU420,
> };
>
> +static const uint32_t rotation_v2_formats[] = {
Just use u32 when in the kernel. It's shorter and is the same.
> + DRM_FORMAT_NV12,
> + /* TODO add formats after validation */
> +};
> +
> /*************************************************************
> * DPU sub blocks config
> *************************************************************/
> @@ -464,8 +472,7 @@ static const struct dpu_ctl_cfg sc7280_ctl[] = {
> *************************************************************/
>
> /* SSPP common configuration */
> -
> -#define _VIG_SBLK(num, sdma_pri, qseed_ver) \
> +#define _VIG_SBLK(num, sdma_pri, qseed_ver, rot_cfg) \
> { \
> .maxdwnscale = MAX_DOWNSCALE_RATIO, \
> .maxupscale = MAX_UPSCALE_RATIO, \
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> index 31af04a..269eb45 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> @@ -312,6 +314,20 @@ struct dpu_qos_lut_tbl {
> };
>
> /**
> + * struct dpu_rotation_cfg - define inline rotation config
> + * @rot_maxheight: max pre rotated height allowed for rotation
> + * @rot_num_formats: count of the formats
number of elements in @rot_format_list
> + * @rot_format_list: list of supported rotator formats
> + * @rot_supported: allowed rotations
> + */
> +struct dpu_rotation_cfg {
> + u32 rot_maxheight;
> + u32 rot_num_formats;
size_t?
> + const u32 *rot_format_list;
> + u32 rot_supported;
> +};
> +
> +/**
> * struct dpu_caps - define DPU capabilities
> * @max_mixer_width max layer mixer line width support.
> * @max_mixer_blendstages max layer mixer blend stages or
> @@ -387,6 +403,7 @@ struct dpu_sspp_sub_blks {
> u32 num_formats;
> const u32 *virt_format_list;
> u32 virt_num_formats;
> + const struct dpu_rotation_cfg *rotation_cfg;
Any kernel-doc update for this new member?
> };
>
> /**
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> index ca75089..031a0ff 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> @@ -528,11 +528,19 @@ static void _dpu_plane_setup_scaler3(struct dpu_plane *pdpu,
> struct dpu_plane_state *pstate,
> uint32_t src_w, uint32_t src_h, uint32_t dst_w, uint32_t dst_h,
> struct dpu_hw_scaler3_cfg *scale_cfg,
> - struct dpu_hw_pixel_ext *pixel_ext,
> const struct dpu_format *fmt,
> uint32_t chroma_subsmpl_h, uint32_t chroma_subsmpl_v)
> {
> uint32_t i;
> + bool inline_rotation = (pstate->rotation & DRM_MODE_ROTATE_90);
Drop useless parenthesis please.
> +
> + /*
> + * For inline rotation cases, scaler config is post-rotation,
> + * so swap the dimensions here. However, pixel extension will
> + * need pre-rotation settings.
> + */
> + if (inline_rotation)
> + swap(src_w, src_h);
>
> scale_cfg->phase_step_x[DPU_SSPP_COMP_0] =
> mult_frac((1 << PHASE_STEP_SHIFT), src_w, dst_w);
> @@ -591,6 +594,24 @@ static void _dpu_plane_setup_scaler3(struct dpu_plane *pdpu,
> scale_cfg->enable = 1;
> }
>
> +static void _dpu_plane_setup_pixel_ext(struct dpu_plane_state *pstate,
> + struct dpu_hw_scaler3_cfg *scale_cfg,
> + struct dpu_hw_pixel_ext *pixel_ext)
> +{
> + int i = 0;
int i;
> + bool inline_rotation = (pstate->rotation & DRM_MODE_ROTATE_90);
> +
> + if (!scale_cfg && !scale_cfg->enable)
!scale_cfg || !scale_cfg->enable
> + return;
> +
> + for (i = 0; i < DPU_MAX_PLANES; i++) {
> + pixel_ext->num_ext_pxls_top[i] = inline_rotation ?
> + scale_cfg->src_width[i] : scale_cfg->src_height[i];
> + pixel_ext->num_ext_pxls_left[i] = inline_rotation ?
> + scale_cfg->src_height[i] : scale_cfg->src_width[i];
> + }
> +}
> +
> static const struct dpu_csc_cfg dpu_csc_YUV2RGB_601L = {
> {
> /* S15.16 format */
> @@ -1035,6 +1061,42 @@ static int dpu_plane_atomic_check(struct drm_plane *plane,
> return -E2BIG;
> }
>
> + if ((pipe_hw_caps->features & BIT(DPU_SSPP_INLINE_ROTATION)) &&
> + (pipe_hw_caps->sblk->rotation_cfg)) {
Drop useless parenthesis please
> + rotation = drm_rotation_simplify(new_plane_state->rotation,
> + pipe_hw_caps->sblk->rotation_cfg->rot_supported);
pipe_hw_caps->sblk is used multiple times. Make it into a local
variable? Also make this whole chunk into a function to reduce
indentation?
> +
> + if (rotation & DRM_MODE_ROTATE_90) {
> + bool found = false;
> + u32 i, num_formats;
unsigned int i, num_formats;
or
size_t
> + const u32 *supported_formats;
> +
> + if ((drm_rect_width(&src) >
Remove useless parenthesis
> + pipe_hw_caps->sblk->rotation_cfg->rot_maxheight)) {
> + DPU_DEBUG_PLANE(pdpu,
> + "invalid height for inline rot:%d max:%d\n",
> + src.y2, pipe_hw_caps->sblk->rotation_cfg->rot_maxheight);
Indent the above two lines one more time so that they don't align
exactly with DPU_DEBUG_PLANE.
> + return -EINVAL;
> + }
> +
> + supported_formats = pipe_hw_caps->sblk->rotation_cfg->rot_format_list;
> + num_formats = pipe_hw_caps->sblk->rotation_cfg->rot_num_formats;
> +
> + for (i = 0; i < num_formats; i++) {
> + /* check for valid formats supported by inline rotation */
> + if (fmt->base.pixel_format == supported_formats[i] &&
> + DPU_FORMAT_IS_UBWC(fmt))
> + found = true;
break?
> + }
> +
> + if (!found || !num_formats) {
> + DPU_DEBUG_PLANE(pdpu,
> + "supported_format not found num:%d\n", num_formats);
Same alignment request. Also, put it on the same line as DPU_DEBUG_PLANE
so we can find it with a grep for that macro.
> + return -EINVAL;
> + }
> + }
> + }
> + pstate->rotation = rotation;
> pstate->needs_qos_remap = drm_atomic_crtc_needs_modeset(crtc_state);
>
> return 0;
> @@ -1150,21 +1212,18 @@ static void dpu_plane_sspp_atomic_update(struct drm_plane *plane)
> pstate->multirect_mode);
>
> if (pdpu->pipe_hw->ops.setup_format) {
> - unsigned int rotation;
>
> src_flags = 0x0;
>
> - rotation = drm_rotation_simplify(state->rotation,
> - DRM_MODE_ROTATE_0 |
> - DRM_MODE_REFLECT_X |
> - DRM_MODE_REFLECT_Y);
> -
> - if (rotation & DRM_MODE_REFLECT_X)
> + if (pstate->rotation & DRM_MODE_REFLECT_X)
> src_flags |= DPU_SSPP_FLIP_LR;
>
> - if (rotation & DRM_MODE_REFLECT_Y)
> + if (pstate->rotation & DRM_MODE_REFLECT_Y)
> src_flags |= DPU_SSPP_FLIP_UD;
>
> + if (pstate->rotation & DRM_MODE_ROTATE_90)
> + src_flags |= DPU_SSPP_ROT_90;
> +
This would be smaller if
rotation = pstate->rotation
replaced drm_rotation_simplify(). Please do that to minimize code
reviewer.
> /* update format */
> pdpu->pipe_hw->ops.setup_format(pdpu->pipe_hw, fmt, src_flags,
> pstate->multirect_index);
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