lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Thu, 3 Mar 2022 13:32:06 +0300
From:   Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To:     Bhupesh Sharma <bhupesh.sharma@...aro.org>
Cc:     linux-arm-msm@...r.kernel.org, bhupesh.linux@...il.com,
        agross@...nel.org, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org, sboyd@...nel.org, tdas@...eaurora.org,
        mturquette@...libre.com, linux-clk@...r.kernel.org,
        robh+dt@...nel.org, bjorn.andersson@...aro.org,
        Rob Herring <robh@...nel.org>
Subject: Re: [PATCH v3 2/2] arm64: dts: qcom: sm8150: Add ufs power-domain entries

On Thu, 3 Mar 2022 at 11:22, Bhupesh Sharma <bhupesh.sharma@...aro.org> wrote:
>
> Add power-domain entries for UFS controller & phy nodes
> in sm8150 dts.
>
> Cc: Bjorn Andersson <bjorn.andersson@...aro.org>
> Cc: Rob Herring <robh@...nel.org>
> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@...aro.org>
> ---
>  arch/arm64/boot/dts/qcom/sm8150.dtsi | 5 +++++
>  1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> index 6012322a5984..7aa879eb24d7 100644
> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> @@ -1637,6 +1637,8 @@ ufs_mem_hc: ufshc@...4000 {
>                         phy-names = "ufsphy";
>                         lanes-per-direction = <2>;
>                         #reset-cells = <1>;
> +
> +                       power-domains = <&gcc UFS_PHY_GDSC>;
>                         resets = <&gcc GCC_UFS_PHY_BCR>;
>                         reset-names = "rst";
>
> @@ -1687,6 +1689,9 @@ ufs_mem_phy: phy@...7000 {
>                         clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>,
>                                  <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
>
> +                       power-domains = <&gcc UFS_CARD_GDSC>,
> +                                       <&gcc UFS_PHY_GDSC>;
> +                       power-domain-names = "ufs_card_gdsc", "ufs_phy_gdsc";

This will not work, if I'm not mistaken. Platform drivers won't bind
two power-domains by default. And the qmp driver lacks handling for
power domains.

Also a generic question. I see that other platforms use UFS_PHY_GDSC
for the host controller and completely ingore the UFS_CARD_GDSC. What
makes sm8150 so different from the rest of the platforms?

>                         resets = <&ufs_mem_hc 0>;
>                         reset-names = "ufsphy";
>                         status = "disabled";
> --
> 2.35.1
>


-- 
With best wishes
Dmitry

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ