linux-kernel - Re: [PATCH v3 5/6] arm64: dts: qcom: sm8150: add ethernet node

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Date:   Thu, 3 Mar 2022 13:34:32 +0300
From:   Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To:     Bhupesh Sharma <bhupesh.sharma@...aro.org>
Cc:     linux-arm-msm@...r.kernel.org, bhupesh.linux@...il.com,
        agross@...nel.org, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org, sboyd@...nel.org, tdas@...eaurora.org,
        mturquette@...libre.com, linux-clk@...r.kernel.org,
        robh+dt@...nel.org, bjorn.andersson@...aro.org,
        Vinod Koul <vkoul@...nel.org>
Subject: Re: [PATCH v3 5/6] arm64: dts: qcom: sm8150: add ethernet node

On Thu, 3 Mar 2022 at 11:49, Bhupesh Sharma <bhupesh.sharma@...aro.org> wrote:
>
> From: Vinod Koul <vkoul@...nel.org>
>
> SM8150 SoC supports ethqos ethernet controller so add the node for it

Is it available e.g. in the sm8150 SoC that I have in the phone?

>
> Cc: Bjorn Andersson <bjorn.andersson@...aro.org>
> Signed-off-by: Vinod Koul <vkoul@...nel.org>
> [bhsharma: Correct ethernet interrupt numbers and add power-domain]
> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@...aro.org>
> ---
>  arch/arm64/boot/dts/qcom/sm8150.dtsi | 27 +++++++++++++++++++++++++++
>  1 file changed, 27 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> index 6012322a5984..2ed231767535 100644
> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> @@ -915,6 +915,33 @@ gpi_dma0: dma-controller@...000 {
>                         status = "disabled";
>                 };
>
> +               ethernet: ethernet@...00 {
> +                       compatible = "qcom,sm8150-ethqos";
> +                       reg = <0x0 0x00020000 0x0 0x10000>,
> +                             <0x0 0x00036000 0x0 0x100>;
> +                       reg-names = "stmmaceth", "rgmii";
> +                       clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii";
> +                       clocks = <&gcc GCC_EMAC_AXI_CLK>,
> +                               <&gcc GCC_EMAC_SLV_AHB_CLK>,
> +                               <&gcc GCC_EMAC_PTP_CLK>,
> +                               <&gcc GCC_EMAC_RGMII_CLK>;
> +                       interrupts = <GIC_SPI 689 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 699 IRQ_TYPE_LEVEL_HIGH>;
> +                       interrupt-names = "macirq", "eth_lpi";
> +
> +                       power-domains = <&gcc EMAC_GDSC>;
> +                       resets = <&gcc GCC_EMAC_BCR>;
> +
> +                       iommus = <&apps_smmu 0x3C0 0x0>;
> +
> +                       snps,tso;
> +                       rx-fifo-depth = <4096>;
> +                       tx-fifo-depth = <4096>;
> +
> +                       status = "disabled";
> +               };
> +
> +
>                 qupv3_id_0: geniqup@...000 {
>                         compatible = "qcom,geni-se-qup";
>                         reg = <0x0 0x008c0000 0x0 0x6000>;
> --
> 2.35.1
>


-- 
With best wishes
Dmitry