linux-kernel - Re: [PATCH V3 0/4] crypto: Add Xilinx ZynqMP SHA3 driver support

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Date:   Thu, 3 Mar 2022 10:59:18 +1200
From:   Herbert Xu <herbert@...dor.apana.org.au>
To:     Harsha <harsha.harsha@...inx.com>
Cc:     davem@...emloft.net, linux-crypto@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        michals@...inx.com, saratcha@...inx.com, harshj@...inx.com,
        git@...inx.com
Subject: Re: [PATCH V3 0/4] crypto: Add Xilinx ZynqMP SHA3 driver support

On Wed, Feb 23, 2022 at 04:05:00PM +0530, Harsha wrote:
> This patch set does the following:
>   - Updates the Makefile for xilinx subdirectory
>   - Adds communication layer support for sha_hash in zynqmp.c
>   - Adds Xilinx ZynqMP driver for SHA3 Algorithm
>   - Updates the list of MAINTAINERS
> 
> Following tests have been done for the driver:
>  - Enabled kernel self tests and extra run-time crypto self tests
>  - Tested SHA hash computation for different sizes of data using
>    userspace application
>  - Tested SHA hash computation using multiple updates of data using
>    userspace application
>  - Tested parallel hash computation
>  - Tested using the tcrypt module
> 
> V3 changes:
> Added details of tests in cover letter
> Added SOB for previous poster of RFC patch
> Removed module_platform_driver in 3/4
> Used memzero_explicit instead of memset in 3/4
> 
> V2 changes:
> - Removed dependency on COMPILE_TEST in 3/4
> - Rebased this patchset on latest Cryptodev-2.6 tree which fixed
> below kernel robot warning
>    In file included from ./arch/s390/include/generated/asm/cacheflush.h:1,
>                     from drivers/crypto/xilinx/zynqmp-sha.c:6:
> include/asm-generic/cacheflush.h:53:46: warning: 'struct folio' declared
> inside parameter list will not be visible outside of this definition
> or declaration
>       53 | static inline void flush_dcache_folio(struct folio *folio) { }
>          |
> - Included linux/cacheflush.h instead of asm/cacheflush.h in 3/4
>  
> V1 changes:
> - Converted RFC patch to PATCH
> - Updated zynqmp-sha driver so that it can be self discovered 
> - Removed patch 3/6 and 4/6 as they added support for device tree
> - Substituted hw with hardware in drivers/crypto/Kconfig
> 
> 
> Harsha (4):
>   drivers: crypto: Updated Makefile for xilinx subdirectory
>   firmware: xilinx: Add ZynqMP SHA API for SHA3 functionality
>   crypto: xilinx: Add Xilinx SHA3 driver
>   MAINTAINERS: Add maintainer for Xilinx ZynqMP SHA3 driver
> 
>  MAINTAINERS                          |   5 +
>  drivers/crypto/Kconfig               |  10 ++
>  drivers/crypto/Makefile              |   2 +-
>  drivers/crypto/xilinx/Makefile       |   1 +
>  drivers/crypto/xilinx/zynqmp-sha.c   | 283 +++++++++++++++++++++++++++++++++++
>  drivers/firmware/xilinx/zynqmp.c     |  26 ++++
>  include/linux/firmware/xlnx-zynqmp.h |   8 +
>  7 files changed, 334 insertions(+), 1 deletion(-)
>  create mode 100644 drivers/crypto/xilinx/zynqmp-sha.c

All applied.  Thanks.
-- 
Email: Herbert Xu <herbert@...dor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt