[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20220304180720.qkvvjtsbbnfugxxy@treble>
Date: Fri, 4 Mar 2022 10:07:20 -0800
From: Josh Poimboeuf <jpoimboe@...hat.com>
To: Peter Zijlstra <peterz@...radead.org>
Cc: x86@...nel.org, joao@...rdrivepizza.com, hjl.tools@...il.com,
andrew.cooper3@...rix.com, linux-kernel@...r.kernel.org,
ndesaulniers@...gle.com, keescook@...omium.org,
samitolvanen@...gle.com, mark.rutland@....com,
alyssa.milburn@...el.com, mbenes@...e.cz, rostedt@...dmis.org,
mhiramat@...nel.org, alexei.starovoitov@...il.com
Subject: Re: [PATCH v3 22/39] x86/ibt: Add IBT feature, MSR and #CP handling
On Thu, Mar 03, 2022 at 12:23:43PM +0100, Peter Zijlstra wrote:
> @@ -310,6 +311,7 @@ void machine_kexec(struct kimage *image)
> /* Interrupts aren't acceptable while we reboot */
> local_irq_disable();
> hw_breakpoint_disable();
> + cet_disable();
>
> if (image->preserve_context) {
> #ifdef CONFIG_X86_IO_APIC
> --- a/arch/x86/kernel/relocate_kernel_64.S
> +++ b/arch/x86/kernel/relocate_kernel_64.S
> @@ -115,6 +115,14 @@ SYM_CODE_START_LOCAL_NOALIGN(identity_ma
> pushq %rdx
>
> /*
> + * Clear X86_CR4_CET (if it was set) such that we can clear CR0_WP
> + * below.
> + */
> + movq %cr4, %rax
> + andq $~(X86_CR4_CET), %rax
> + movq %rax, %cr4
> +
> + /*
> * Set cr0 to a known state:
> * - Paging enabled
> * - Alignment check disabled
This probably belongs in a separate patch...
--
Josh
Powered by blists - more mailing lists