linux-kernel - Re: [PATCH v10 5/6] dt-bindings: mfd: Add Delta TN48M CPLD drivers bindings

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Date:   Fri, 4 Mar 2022 15:47:16 -0600
From:   Rob Herring <robh@...nel.org>
To:     Robert Marko <robert.marko@...tura.hr>
Cc:     Lee Jones <lee.jones@...aro.org>,
        Linus Walleij <linus.walleij@...aro.org>, brgl@...ev.pl,
        Philipp Zabel <p.zabel@...gutronix.de>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        devicetree <devicetree@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        skhan@...uxfoundation.org, Luka Perkov <luka.perkov@...tura.hr>
Subject: Re: [PATCH v10 5/6] dt-bindings: mfd: Add Delta TN48M CPLD drivers
 bindings

On Thu, Mar 03, 2022 at 01:41:13PM +0100, Robert Marko wrote:
> On Wed, Mar 2, 2022 at 10:39 PM Rob Herring <robh@...nel.org> wrote:
> >
> > On Wed, Mar 02, 2022 at 08:47:32AM +0000, Lee Jones wrote:
> > > On Mon, 31 Jan 2022, Robert Marko wrote:
> > >
> > > > Add binding documents for the Delta TN48M CPLD drivers.
> > > >
> > > > Signed-off-by: Robert Marko <robert.marko@...tura.hr>
> > >
> > > This is missing a DT review.
> >
> > How about this one[1]?
> >
> > Rob
> >
> > [1] https://lore.kernel.org/all/20210719225906.GA2769608@robh.at.kernel.org/
> 
> Hi Rob,
> Thanks for reaching out.
> 
> As you can see the bindings have evolved since v6,
> GPIO driver now only uses 2 distinct compatibles.

Fundamentally, it hasn't really changed.

There's 2 main issues. First, I don't see the need for any child nodes. 
This would be sufficient:

cpld@41 {
    compatible = "delta,tn48m-cpld";
    reg = <0x41>;
    #reset-cells = <1>;
    #gpio-cells = <2>;
    gpio-controller;
};

You only need child nodes if the sub-blocks have their own resources or 
are widely reused in different configurations.

The 2nd issue is whether GPIOs are even GPIOs at all. I don't recall 
that Linus ever agreed.

Both issues kind of boil down to is there even more that 1 variation of 
this h/w where you have differing connections? AFAICT, Delta tn48m is a 
pretty specific device and I would guess something implemented in a CPLD 
is likely to change on every board design. At least that's my experience 
with 'board level logic'.

Rob