linux-kernel - Re: [PATCH v4 3/6] RISC-V: Treat IPIs as normal Linux IRQs

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Message-ID: <87ee3ita73.wl-maz@kernel.org>
Date:   Fri, 04 Mar 2022 08:04:48 +0000
From:   Marc Zyngier <maz@...nel.org>
To:     Anup Patel <anup@...infault.org>
Cc:     Anup Patel <apatel@...tanamicro.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Daniel Lezcano <daniel.lezcano@...aro.org>,
        Atish Patra <atishp@...shpatra.org>,
        Alistair Francis <Alistair.Francis@....com>,
        linux-riscv <linux-riscv@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org List" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v4 3/6] RISC-V: Treat IPIs as normal Linux IRQs

On Tue, 01 Mar 2022 17:40:55 +0000,
Anup Patel <anup@...infault.org> wrote:
> 
> On Tue, Mar 1, 2022 at 8:07 PM Marc Zyngier <maz@...nel.org> wrote:
> > > +struct ipi_mux {
> > > +     struct irq_domain *domain;
> > > +     int parent_virq;
> > > +     void (*clear_ipi)(void);
> > > +     void (*send_ipi)(const struct cpumask *mask);
> > > +};
> >
> > Why do you need this in the arch code? It really looks like something
> > that is irqchip specific (single IPI signal on which actual IPIs are
> > overlayed). It is also something that other irqchips are already
> > implementing, so there is potential for consolidation.
> 
> I agree we can share the IPI muxing among irqchip drivers.
> 
> I was not sure where to place this IPI muxing so I made it
> RISC-V specific initially.
> 
> Can we place a simplified IPI muxing (with no RISC-V specific
> stuff) under drivers/irqchip or kernel/irq ??

We already have IPI-specific code in kernel/irq, so it should probably
live there.

> > > +struct irq_domain *riscv_ipi_mux_create(bool use_soft_irq,
> > > +                     void (*clear_ipi)(void),
> > > +                     void (*send_ipi)(const struct cpumask *mask))
> > > +{
> >
> > There really shouldn't be a need for such a registration interface
> > anyway (the current idiom is to allocate IPIs in the root irqchip, and
> > pass them to the arch code).
> >
> > Why can't you model it after the existing architectures?
> 
> I ended up with a lot of duplicate code between SBI IPI driver and
> SiFive CLINT driver so I factored out the IPI muxing as separate
> sources. We also have RISC-V AIA drivers using the same IPI muxing.
> 
> If we simplify the IPI muxing and move it out of arch/riscv then
> changes in this patch are straight forward to review.

It isn't only about making things easier to review. It is about having
consistent interfaces across architecture and reducing the amount of
glue between arch code and random drivers. If there is a lot of
similar code between your various irqchips, then it can be made common
between the irqchips. But the interface between arch code and those
should not be arch-specific.

	M.

-- 
Without deviation from the norm, progress is not possible.