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Message-ID: <0b5cd0cd-8a8f-4894-b198-7724e6224777@microchip.com>
Date:   Fri, 4 Mar 2022 11:42:46 +0100
From:   Nicolas Ferre <nicolas.ferre@...rochip.com>
To:     Claudiu Beznea <claudiu.beznea@...rochip.com>,
        <alexandre.belloni@...tlin.com>, <ludovic.desroches@...rochip.com>
CC:     <robh+dt@...nel.org>, <linux@...linux.org.uk>,
        <linux-arm-kernel@...ts.infradead.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 1/2] ARM: dts: at91: sama7g5: add eic node

On 28/02/2022 at 13:23, Claudiu Beznea wrote:
> Add EIC node.
> 
> Signed-off-by: Claudiu Beznea <claudiu.beznea@...rochip.com>

Acked-by: Nicolas Ferre <nicolas.ferre@...rochip.com>

Queued in at91-dt for 5.18.
Best regards,
   Nicolas

> ---
>   arch/arm/boot/dts/sama7g5.dtsi | 13 +++++++++++++
>   1 file changed, 13 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi
> index e6d0c90cf710..efc5437f09ec 100644
> --- a/arch/arm/boot/dts/sama7g5.dtsi
> +++ b/arch/arm/boot/dts/sama7g5.dtsi
> @@ -455,6 +455,19 @@ i2s1: i2s@...20000 {
>   			status = "disabled";
>   		};
>   
> +		eic: interrupt-controller@...28000 {
> +			compatible = "microchip,sama7g5-eic";
> +			reg = <0xe1628000 0xec>;
> +			interrupt-parent = <&gic>;
> +			interrupt-controller;
> +			#interrupt-cells = <2>;
> +			interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&pmc PMC_TYPE_PERIPHERAL 37>;
> +			clock-names = "pclk";
> +			status = "disabled";
> +		};
> +
>   		pit64b0: timer@...00000 {
>   			compatible = "microchip,sama7g5-pit64b", "microchip,sam9x60-pit64b";
>   			reg = <0xe1800000 0x4000>;


-- 
Nicolas Ferre

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