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Message-Id: <20220304153548.3364480-3-michael@walle.cc>
Date: Fri, 4 Mar 2022 16:35:43 +0100
From: Michael Walle <michael@...le.cc>
To: Kavyasree Kotagiri <kavyasree.kotagiri@...rochip.com>,
Nicolas Ferre <nicolas.ferre@...rochip.com>
Cc: Arnd Bergmann <arnd@...db.de>, Olof Johansson <olof@...om.net>,
soc@...nel.org, linux-arm-kernel@...ts.infradead.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>,
Alexandre Belloni <alexandre.belloni@...tlin.com>,
Claudiu Beznea <claudiu.beznea@...rochip.com>,
Michael Walle <michael@...le.cc>
Subject: [PATCH v2 2/7] ARM: dts: lan966x: add sgpio node
Add the device tree node for the SGPIO IP block reused from the
SparX-5. Keep the node disabled by default.
Signed-off-by: Michael Walle <michael@...le.cc>
---
arch/arm/boot/dts/lan966x.dtsi | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi
index 5e9cbc8cdcbc..39dfdb8e29ed 100644
--- a/arch/arm/boot/dts/lan966x.dtsi
+++ b/arch/arm/boot/dts/lan966x.dtsi
@@ -223,6 +223,32 @@ gpio: pinctrl@...04064 {
#interrupt-cells = <2>;
};
+ sgpio: gpio@...04190 {
+ compatible = "microchip,sparx5-sgpio";
+ reg = <0xe2004190 0x118>;
+ clocks = <&sys_clk>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ sgpio_in: gpio@0 {
+ compatible = "microchip,sparx5-sgpio-bank";
+ reg = <0>;
+ gpio-controller;
+ #gpio-cells = <3>;
+ interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ };
+
+ sgpio_out: gpio@1 {
+ compatible = "microchip,sparx5-sgpio-bank";
+ reg = <1>;
+ gpio-controller;
+ #gpio-cells = <3>;
+ };
+ };
+
gic: interrupt-controller@...11000 {
compatible = "arm,gic-400", "arm,cortex-a7-gic";
#interrupt-cells = <3>;
--
2.30.2
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