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Message-Id: <20220304153548.3364480-4-michael@walle.cc>
Date:   Fri,  4 Mar 2022 16:35:44 +0100
From:   Michael Walle <michael@...le.cc>
To:     Kavyasree Kotagiri <kavyasree.kotagiri@...rochip.com>,
        Nicolas Ferre <nicolas.ferre@...rochip.com>
Cc:     Arnd Bergmann <arnd@...db.de>, Olof Johansson <olof@...om.net>,
        soc@...nel.org, linux-arm-kernel@...ts.infradead.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>,
        Alexandre Belloni <alexandre.belloni@...tlin.com>,
        Claudiu Beznea <claudiu.beznea@...rochip.com>,
        Michael Walle <michael@...le.cc>
Subject: [PATCH v2 3/7] ARM: dts: lan966x: add missing uart DMA channel

The usart node of the flexcom3 block is missing the DMA channels. Add
it.

Signed-off-by: Michael Walle <michael@...le.cc>
---
 arch/arm/boot/dts/lan966x.dtsi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi
index 39dfdb8e29ed..230de3bdd5f1 100644
--- a/arch/arm/boot/dts/lan966x.dtsi
+++ b/arch/arm/boot/dts/lan966x.dtsi
@@ -144,6 +144,9 @@ usart3: serial@200 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0x200 0x200>;
 				interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&dma0 AT91_XDMAC_DT_PERID(9)>,
+				       <&dma0 AT91_XDMAC_DT_PERID(8)>;
+				dma-names = "tx", "rx";
 				clocks = <&nic_clk>;
 				clock-names = "usart";
 				atmel,fifo-size = <32>;
-- 
2.30.2

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