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Message-ID: <000501d8317e$8563cc20$902b6460$@samsung.com>
Date:   Sun, 6 Mar 2022 22:50:45 +0530
From:   "Alim Akhtar" <alim.akhtar@...sung.com>
To:     "'Krzysztof Kozlowski'" <krzysztof.kozlowski@...onical.com>,
        "'Daniel Lezcano'" <daniel.lezcano@...aro.org>,
        "'Thomas Gleixner'" <tglx@...utronix.de>,
        "'Rob Herring'" <robh+dt@...nel.org>,
        <linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-samsung-soc@...r.kernel.org>
Subject: RE: [PATCH v2 4/4] arm64: dts: tesla: add a specific compatible to
 MCT on FSD



>-----Original Message-----
>From: Krzysztof Kozlowski [mailto:krzysztof.kozlowski@...onical.com]
>Sent: Friday, March 4, 2022 5:54 PM
>To: Daniel Lezcano <daniel.lezcano@...aro.org>; Thomas Gleixner
><tglx@...utronix.de>; Rob Herring <robh+dt@...nel.org>; Krzysztof
>Kozlowski <krzysztof.kozlowski@...onical.com>; Alim Akhtar
><alim.akhtar@...sung.com>; linux-kernel@...r.kernel.org;
>devicetree@...r.kernel.org; linux-arm-kernel@...ts.infradead.org; linux-
>samsung-soc@...r.kernel.org
>Subject: [PATCH v2 4/4] arm64: dts: tesla: add a specific compatible to MCT
on
>FSD
>
>One compatible is used for the Multi-Core Timer on Tesla FSD SoC, which is
>correct but not specific enough.  The MCT blocks have different number of
>interrupts, so add a second specific compatible to Tesla FSD.
>
>Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
>---

Reviewed-by: Alim Akhtar <alim.akhtar@...sung.com>


> arch/arm64/boot/dts/tesla/fsd.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
>diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi
>b/arch/arm64/boot/dts/tesla/fsd.dtsi
>index 9a652abcbcac..10c217a57a7d 100644
>--- a/arch/arm64/boot/dts/tesla/fsd.dtsi
>+++ b/arch/arm64/boot/dts/tesla/fsd.dtsi
>@@ -727,7 +727,7 @@ spi_2: spi@...60000 {
> 		};
>
> 		timer@...40000 {
>-			compatible = "samsung,exynos4210-mct";
>+			compatible = "tesla,fsd-mct", "samsung,exynos4210-
>mct";
> 			reg = <0x0 0x10040000 0x0 0x800>;
> 			interrupts = <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>,
> 				<GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>,
>--
>2.32.0


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