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Date:   Mon, 7 Mar 2022 20:25:10 +0800
From:   Tim Chang <jia-wei.chang@...iatek.com>
To:     MyungJoo Ham <myungjoo.ham@...sung.com>,
        Kyungmin Park <kyungmin.park@...sung.com>,
        Chanwoo Choi <cw00.choi@...sung.com>,
        "Rob Herring" <robh+dt@...nel.org>,
        Matthias Brugger <matthias.bgg@...il.com>,
        "Liam Girdwood" <lgirdwood@...il.com>,
        Mark Brown <broonie@...nel.org>,
        "Jia-Wei Chang" <jia-wei.chang@...iatek.com>
CC:     <linux-pm@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-mediatek@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>, <fan.chen@...iatek.com>,
        <louis.yu@...iatek.com>, <roger.lu@...iatek.com>,
        <Allen-yy.Lin@...iatek.com>,
        <Project_Global_Chrome_Upstream_Group@...iatek.com>,
        <hsinyi@...gle.com>
Subject: [PATCH 0/3] devfreq: mediatek: introduce MTK cci devfreq

The Cache Coherent Interconnect (CCI) is the management of cache
coherency by hardware. CCI DEVFREQ is DVFS driver for power saving by
scaling clock frequency and supply voltage of CCI. CCI uses the same
input clock source and power rail as LITTLE CPUs on Mediatek SoCs.

Jia-Wei Chang (3):
  dt-bindings: devfreq: mediatek: add mtk cci devfreq dt-bindings
  devfreq: mediatek: add mt8183 cci devfreq driver
  devfreq: mediatek: add platform data to support mt8186

 .../devicetree/bindings/devfreq/mtk-cci.yaml  |  73 +++
 drivers/devfreq/Kconfig                       |  11 +-
 drivers/devfreq/Makefile                      |   2 +-
 drivers/devfreq/mtk-cci-devfreq.c             | 481 ++++++++++++++++++
 4 files changed, 565 insertions(+), 2 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/devfreq/mtk-cci.yaml
 create mode 100644 drivers/devfreq/mtk-cci-devfreq.c

-- 
2.18.0

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