linux-kernel - Re: [PATCHv5 23/30] x86/boot: Avoid #VE during boot for TDX platforms

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Message-ID: <e8452e86-4063-c85b-5e21-c7cd6ce51423@intel.com>
Date:   Mon, 7 Mar 2022 17:29:27 +0800
From:   Xiaoyao Li <xiaoyao.li@...el.com>
To:     "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>,
        tglx@...utronix.de, mingo@...hat.com, bp@...en8.de,
        dave.hansen@...el.com, luto@...nel.org, peterz@...radead.org
Cc:     sathyanarayanan.kuppuswamy@...ux.intel.com, aarcange@...hat.com,
        ak@...ux.intel.com, dan.j.williams@...el.com, david@...hat.com,
        hpa@...or.com, jgross@...e.com, jmattson@...gle.com,
        joro@...tes.org, jpoimboe@...hat.com, knsathya@...nel.org,
        pbonzini@...hat.com, sdeep@...are.com, seanjc@...gle.com,
        tony.luck@...el.com, vkuznets@...hat.com, wanpengli@...cent.com,
        thomas.lendacky@....com, brijesh.singh@....com, x86@...nel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCHv5 23/30] x86/boot: Avoid #VE during boot for TDX platforms

On 3/2/2022 10:27 PM, Kirill A. Shutemov wrote:
> From: Sean Christopherson <seanjc@...gle.com>
> 
> There are a few MSRs and control register bits that the kernel
> normally needs to modify during boot. But, TDX disallows
> modification of these registers to help provide consistent security
> guarantees. Fortunately, TDX ensures that these are all in the correct
> state before the kernel loads, which means the kernel does not need to
> modify them.
> 
> The conditions to avoid are:
> 
>   * Any writes to the EFER MSR
>   * Clearing CR3.MCE

typo. CR4.MCE

BTW, I remember there was a patch to clear X86_FEATURE_MCE for TDX 
guest. Why does that get dropped?

Even though CPUID reports MCE is supported, all the access to MCE 
related MSRs causes #VE. If they are accessed via mce_rdmsrl(), the #VE 
will be fixed up and goes to ex_handler_msr_mce(). Finally lead to panic().