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Message-ID: <CALMp9eSvhcPcM4rh90BXV-K1SWUEFJr-7CkgdFgLFhhMT-VoSw@mail.gmail.com>
Date:   Tue, 8 Mar 2022 08:14:36 -0800
From:   Jim Mattson <jmattson@...gle.com>
To:     Like Xu <like.xu.linux@...il.com>
Cc:     Paolo Bonzini <pbonzini@...hat.com>, kvm@...r.kernel.org,
        Sean Christopherson <seanjc@...gle.com>,
        Wanpeng Li <wanpengli@...cent.com>,
        Vitaly Kuznetsov <vkuznets@...hat.com>,
        Joerg Roedel <joro@...tes.org>, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 12/12] KVM: x86/pmu: Clear reserved bit PERF_CTL2[43]
 for AMD erratum 1292

On Tue, Mar 8, 2022 at 3:25 AM Like Xu <like.xu.linux@...il.com> wrote:
>
> On 5/3/2022 3:06 am, Jim Mattson wrote:
> > We should continue to synthesize a #GP for an attempt to set "must be
> > zero" bits or for rule violations, like "address must be canonical."
>
> Actually, I do stand in the same position as you.
>
> > However, we have absolutely no business making up our own hardware
> > specification. This is a bug, and it should be fixed, like any other
> > bug.
> Current virtual hardware interfaces do not strictly comply with vendor
> specifications
> and may not be the same in the first step of enablement, or some of them may have
> to be compromised later out of various complexity.
>
> The behavior of AMD's "synthesize a #GP" to "reserved without qualification" bits
> is clearly a legacy tech decision (not sure if it was intentional). We may need
> a larger
> independent patch set to apply this one-time surgery, including of course this
> pmu issue.
>
> What do you think ?

The PMU issue needs to be fixed ASAP, since a Linux guest will set the
"host-only" bit on a CPU that doesn't support it, and Linux expects
the bit to be ignored and the remainder of the PerfEvtSeln to be
written. Currently, KVM synthesizes #GP and the PerfEvtSeln is not
written.

I don't believe it is necessary to fix all related issues at one time.
Incremental fixes should be fine.

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