linux-kernel - [irqchip: irq/irqchip-next] arm64: dts: apple: Add t8103 PMU interrupt affinities

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [day] [month] [year] [list]

Message-ID: <164675860195.16921.996545906775527331.tip-bot2@tip-bot2>
Date:   Tue, 08 Mar 2022 16:56:41 -0000
From:   "irqchip-bot for Marc Zyngier" <tip-bot2@...utronix.de>
To:     linux-kernel@...r.kernel.org
Cc:     Marc Zyngier <maz@...nel.org>, tglx@...utronix.de
Subject: [irqchip: irq/irqchip-next] arm64: dts: apple: Add t8103 PMU
 interrupt affinities

The following commit has been merged into the irq/irqchip-next branch of irqchip:

Commit-ID:     1852e22b318b8d1c02b574da679b1b74f3686090
Gitweb:        https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/1852e22b318b8d1c02b574da679b1b74f3686090
Author:        Marc Zyngier <maz@...nel.org>
AuthorDate:    Tue, 14 Dec 2021 15:56:55 
Committer:     Marc Zyngier <maz@...nel.org>
CommitterDate: Mon, 07 Feb 2022 16:00:42 

arm64: dts: apple: Add t8103 PMU interrupt affinities

The two PMU pseudo interrupts have specific affinities. One set
is affine to the small cores, and the other set affine to the
big ones.

Signed-off-by: Marc Zyngier <maz@...nel.org>
---
 arch/arm64/boot/dts/apple/t8103.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm64/boot/dts/apple/t8103.dtsi b/arch/arm64/boot/dts/apple/t8103.dtsi
index 19afbc9..a2e0065 100644
--- a/arch/arm64/boot/dts/apple/t8103.dtsi
+++ b/arch/arm64/boot/dts/apple/t8103.dtsi
@@ -213,6 +213,18 @@
 			interrupt-controller;
 			reg = <0x2 0x3b100000 0x0 0x8000>;
 			power-domains = <&ps_aic>;
+
+			affinities {
+				e-core-pmu-affinity {
+					apple,fiq-index = <AIC_CPU_PMU_E>;
+					cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
+				};
+
+				p-core-pmu-affinity {
+					apple,fiq-index = <AIC_CPU_PMU_P>;
+					cpus = <&cpu4 &cpu5 &cpu6 &cpu7>;
+				};
+			};
 		};
 
 		pmgr: power-management@...700000 {