linux-kernel - [irqchip: irq/irqchip-next] dt-bindings: apple,aic: Add CPU PMU per-cpu pseudo-interrupts

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Message-ID: <164675860602.16921.1205276128705301674.tip-bot2@tip-bot2>
Date:   Tue, 08 Mar 2022 16:56:46 -0000
From:   "irqchip-bot for Marc Zyngier" <tip-bot2@...utronix.de>
To:     linux-kernel@...r.kernel.org
Cc:     Rob Herring <robh@...nel.org>, Hector Martin <marcan@...can.st>,
        Marc Zyngier <maz@...nel.org>, tglx@...utronix.de
Subject: [irqchip: irq/irqchip-next] dt-bindings: apple,aic: Add CPU PMU
 per-cpu pseudo-interrupts

The following commit has been merged into the irq/irqchip-next branch of irqchip:

Commit-ID:     74703b13f9d2ef286ef588f29295a2fd30b5f295
Gitweb:        https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/74703b13f9d2ef286ef588f29295a2fd30b5f295
Author:        Marc Zyngier <maz@...nel.org>
AuthorDate:    Mon, 01 Nov 2021 19:58:42 
Committer:     Marc Zyngier <maz@...nel.org>
CommitterDate: Mon, 07 Feb 2022 16:00:41 

dt-bindings: apple,aic: Add CPU PMU per-cpu pseudo-interrupts

Advertise the two pseudo-interrupts that tied to the two PMU
flavours present in the Apple M1 SoC.

We choose the expose two different pseudo-interrupts to the OS
as the e-core PMU is obviously different from the p-core one,
effectively presenting two different devices.

Acked-by: Rob Herring <robh@...nel.org>
Reviewed-by: Hector Martin <marcan@...can.st>
Signed-off-by: Marc Zyngier <maz@...nel.org>
---
 Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml | 2 ++
 include/dt-bindings/interrupt-controller/apple-aic.h                  | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
index 9735902..c7577d4 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
@@ -56,6 +56,8 @@ properties:
           - 1: virtual HV timer
           - 2: physical guest timer
           - 3: virtual guest timer
+          - 4: 'efficient' CPU PMU
+          - 5: 'performance' CPU PMU
 
       The 3rd cell contains the interrupt flags. This is normally
       IRQ_TYPE_LEVEL_HIGH (4).
diff --git a/include/dt-bindings/interrupt-controller/apple-aic.h b/include/dt-bindings/interrupt-controller/apple-aic.h
index 604f2bb..bf3aac0 100644
--- a/include/dt-bindings/interrupt-controller/apple-aic.h
+++ b/include/dt-bindings/interrupt-controller/apple-aic.h
@@ -11,5 +11,7 @@
 #define AIC_TMR_HV_VIRT		1
 #define AIC_TMR_GUEST_PHYS	2
 #define AIC_TMR_GUEST_VIRT	3
+#define AIC_CPU_PMU_E		4
+#define AIC_CPU_PMU_P		5
 
 #endif