lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <YijaWxjDESZRrHXQ@lunn.ch>
Date:   Wed, 9 Mar 2022 17:48:27 +0100
From:   Andrew Lunn <andrew@...n.ch>
To:     Clément Léger <clement.leger@...tlin.com>
Cc:     Heiner Kallweit <hkallweit1@...il.com>,
        Russell King <linux@...linux.org.uk>,
        "David S . Miller" <davem@...emloft.net>,
        Jakub Kicinski <kuba@...nel.org>,
        Florian Fainelli <f.fainelli@...il.com>,
        "Andrew F . Davis" <afd@...com>, Dan Murphy <dmurphy@...com>,
        netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
        Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
        Miquel Raynal <miquel.raynal@...tlin.com>
Subject: Re: [PATCH] net: phy: DP83822: clear MISR2 register to disable
 interrupts

On Wed, Mar 09, 2022 at 03:22:28PM +0100, Clément Léger wrote:
> MISR1 was cleared twice but the original author intention was probably
> to clear MISR1 & MISR2 to completely disable interrupts. Fix it to
> clear MISR2.
> 
> Fixes: 87461f7a58ab ("net: phy: DP83822 initial driver submission")
> Signed-off-by: Clément Léger <clement.leger@...tlin.com>

Reviewed-by: Andrew Lunn <andrew@...n.ch>

    Andrew

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ