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Message-ID: <d6db956d-38b5-c3bc-611d-c947e246a36e@intel.com>
Date:   Wed, 9 Mar 2022 12:39:26 -0800
From:   Dave Hansen <dave.hansen@...el.com>
To:     "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>,
        tglx@...utronix.de, mingo@...hat.com, bp@...en8.de,
        luto@...nel.org, peterz@...radead.org
Cc:     sathyanarayanan.kuppuswamy@...ux.intel.com, aarcange@...hat.com,
        ak@...ux.intel.com, dan.j.williams@...el.com, david@...hat.com,
        hpa@...or.com, jgross@...e.com, jmattson@...gle.com,
        joro@...tes.org, jpoimboe@...hat.com, knsathya@...nel.org,
        pbonzini@...hat.com, sdeep@...are.com, seanjc@...gle.com,
        tony.luck@...el.com, vkuznets@...hat.com, wanpengli@...cent.com,
        thomas.lendacky@....com, brijesh.singh@....com, x86@...nel.org,
        linux-kernel@...r.kernel.org,
        Isaku Yamahata <isaku.yamahata@...el.com>
Subject: Re: [PATCHv5 28/30] x86/tdx: ioapic: Add shared bit for IOAPIC base
 address

On 3/2/22 06:28, Kirill A. Shutemov wrote:
> +static void io_apic_set_fixmap_nocache(enum fixed_addresses idx,
> +				       phys_addr_t phys)
> +{
> +	pgprot_t flags = FIXMAP_PAGE_NOCACHE;
> +
> +	flags = pgprot_decrypted(flags);
> +	__set_fixmap(idx, phys, flags);
> +}

This is only used by the "io_apic".  No need to add the "_nocache".  Maybe:

static void io_apic_set_fixmap(enum fixed_addresses idx, ...
{
	pgprot_t flags = FIXMAP_PAGE_NOCACHE;

	/*
	 * Ensure fixmaps for IOAPIC MMIO respect memory
	 * encryption pgprot bits, just like normal ioremap():
	 */
	flags = pgprot_decrypted(flags);

	__set_fixmap(idx, phys, flags);
}

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