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Message-ID: <81b6f618-05bc-f7d0-5461-4c3f0ca42d3f@intel.com>
Date:   Thu, 10 Mar 2022 07:16:27 -0800
From:   Dave Hansen <dave.hansen@...el.com>
To:     Bharata B Rao <bharata@....com>, linux-kernel@...r.kernel.org
Cc:     linux-mm@...ck.org, x86@...nel.org,
        kirill.shutemov@...ux.intel.com, tglx@...utronix.de,
        mingo@...hat.com, bp@...en8.de, dave.hansen@...ux.intel.com,
        catalin.marinas@....com, will@...nel.org, shuah@...nel.org,
        oleg@...hat.com, ananth.narayan@....com
Subject: Re: [RFC PATCH v0 0/6] x86/AMD: Userspace address tagging

On 3/10/22 03:15, Bharata B Rao wrote:>
> This patchset builds on that prctl() extension and adds support
> for AMD UAI. AMD implementation is kept separate as equivalent
> Intel LAM implementation is likely to be different due to different
> bit positions and tag width.

Please don't keep the implementations separate.

We'll have one x86 implementation of address bit masking.  Both the
Intel and AMD implementations will feed into a shared implementation.
Something _like_ the cc_set_mask() interface where both implementations
do their detection and then call into common code to say how many bits
are being ignored.

A good litmus test for this is how many vendor-specific checks there are
in common code.  If there are a lot of them, it's not a good sign for
the design.

I'd also highly suggest going over Kirill's patch set in detail.  There
are things like this:

> https://lore.kernel.org/linux-mm/20210205151631.43511-10-kirill.shutemov@linux.intel.com/

which seem pretty sane to me but which are (I think) missing in this set.

I don't know if we can get there but, in an ideal world, this would be
series with, say 7 patches.  Patches 1-5 are generic enabling.  Patch 6
is tiny and does detection and enabling for UAI.  Patch 7 does the same
for LAM.  All the patches in the series are acked from LAM and UAI folks.

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