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Message-ID: <dad15ad0-1095-d19c-7cd7-06810cb1dbc2@alliedtelesis.co.nz>
Date:   Thu, 10 Mar 2022 21:51:37 +0000
From:   Chris Packham <Chris.Packham@...iedtelesis.co.nz>
To:     Andrew Lunn <andrew@...n.ch>
CC:     "linus.walleij@...aro.org" <linus.walleij@...aro.org>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "catalin.marinas@....com" <catalin.marinas@....com>,
        "will@...nel.org" <will@...nel.org>,
        "gregory.clement@...tlin.com" <gregory.clement@...tlin.com>,
        "sebastian.hesselbarth@...il.com" <sebastian.hesselbarth@...il.com>,
        "kostap@...vell.com" <kostap@...vell.com>,
        "robert.marko@...tura.hr" <robert.marko@...tura.hr>,
        "linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v1 2/4] pinctrl: mvebu: pinctrl driver for 98DX2530 SoC


On 11/03/22 02:59, Andrew Lunn wrote:
> On Thu, Mar 10, 2022 at 04:00:37PM +1300, Chris Packham wrote:
>> This pinctrl driver supports the 98DX25xx and 98DX35xx family of chips
>> from Marvell. It is based on the Marvell SDK with additions for various
>> (non-gpio) pin configurations based on the datasheet.
>>
>> Signed-off-by: Chris Packham <chris.packham@...iedtelesis.co.nz>
> Hi Chris
>
> Past experience with pinctrl and gpio for mvebu is that developers get
> GPI and GPO pins wrong. Are there any pins which are not GPIO but only
> a subset, so only GPI or GPO?
According to the datasheet they are all GPIO. Some are sampled at reset 
so have notes about being careful not to drive them differently during 
reset.
>    Andrew

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