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Message-ID: <202203110634.lyi263Cj-lkp@intel.com>
Date: Fri, 11 Mar 2022 06:11:42 +0800
From: kernel test robot <lkp@...el.com>
To: Tom <support@...rs.com>
Cc: kbuild-all@...ts.01.org, linux-kernel@...r.kernel.org,
Emil Renner Berthing <kernel@...il.dk>
Subject: [esmil:visionfive 29/64]
drivers/soc/sifive/sifive_l2_cache.c:152:17: error: implicit declaration of
function 'writeq'; did you mean 'writeb'?
tree: https://github.com/esmil/linux visionfive
head: 996f88ea65b2f557926d7fe73d69fdc2da92430a
commit: def7ba448ac4b53b788d238985ef97702dc802a1 [29/64] sifive/sifive_l2_cache: Add sifive_l2_flush64_range function
config: riscv-randconfig-r033-20220310 (https://download.01.org/0day-ci/archive/20220311/202203110634.lyi263Cj-lkp@intel.com/config)
compiler: riscv32-linux-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/esmil/linux/commit/def7ba448ac4b53b788d238985ef97702dc802a1
git remote add esmil https://github.com/esmil/linux
git fetch --no-tags esmil visionfive
git checkout def7ba448ac4b53b788d238985ef97702dc802a1
# save the config file to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=riscv SHELL=/bin/bash
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@...el.com>
All errors (new ones prefixed by >>):
drivers/soc/sifive/sifive_l2_cache.c: In function 'sifive_l2_flush64_range':
>> drivers/soc/sifive/sifive_l2_cache.c:152:17: error: implicit declaration of function 'writeq'; did you mean 'writeb'? [-Werror=implicit-function-declaration]
152 | writeq(line, l2_base + SIFIVE_L2_FLUSH64);
| ^~~~~~
| writeb
cc1: some warnings being treated as errors
vim +152 drivers/soc/sifive/sifive_l2_cache.c
123
124 #ifdef CONFIG_SIFIVE_L2_FLUSH
125 void sifive_l2_flush64_range(unsigned long start, unsigned long len)
126 {
127 unsigned long line;
128
129 if(!l2_base) {
130 pr_warn("L2CACHE: base addr invalid, skipping flush\n");
131 return;
132 }
133
134 /* TODO: if (len == 0), skipping flush or going on? */
135 if(!len) {
136 pr_debug("L2CACHE: flush64 range @ 0x%lx(len:0)\n", start);
137 return;
138 }
139
140 /* make sure the address is in the range */
141 if(start < CONFIG_SIFIVE_L2_FLUSH_START ||
142 (start + len) > (CONFIG_SIFIVE_L2_FLUSH_START +
143 CONFIG_SIFIVE_L2_FLUSH_SIZE)) {
144 pr_warn("L2CACHE: flush64 out of range: %lx(%lx), skip flush\n",
145 start, len);
146 return;
147 }
148
149 mb(); /* sync */
150 for (line = start; line < start + len;
151 line += SIFIVE_L2_FLUSH64_LINE_LEN) {
> 152 writeq(line, l2_base + SIFIVE_L2_FLUSH64);
153 mb();
154 }
155 }
156 EXPORT_SYMBOL_GPL(sifive_l2_flush64_range);
157 #endif
158
---
0-DAY CI Kernel Test Service, Intel Corporation
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