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Message-ID: <20220310234509.32636-1-miles.chen@mediatek.com>
Date: Fri, 11 Mar 2022 07:45:09 +0800
From: Miles Chen <miles.chen@...iatek.com>
To: <chun-jie.chen@...iatek.com>
CC: <Project_Global_Chrome_Upstream_Group@...iatek.com>,
<devicetree@...r.kernel.org>, <drinkcat@...omium.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-clk@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-mediatek@...ts.infradead.org>, <matthias.bgg@...il.com>,
<robh+dt@...nel.org>, <sboyd@...nel.org>,
<srv_heupstream@...iatek.com>
Subject: Re: [PATCH v2 01/15] dt-bindings: ARM: Mediatek: Add new document bindings of MT8186 clock
Hi Chun-Jie,
> [PATCH v2 01/15] dt-bindings: ARM: Mediatek: Add new document bindings of MT8186 clock
s/Mediatek/MediaTek/
> This patch adds the new binding documentation for system clock
> and functional clock on Mediatek MT8186.
s/Mediatek/MediaTek/
>
> Signed-off-by: Chun-Jie Chen <chun-jie.chen@...iatek.com>
> ---
> .../arm/mediatek/mediatek,mt8186-clock.yaml | 56 +++
> .../mediatek/mediatek,mt8186-sys-clock.yaml | 54 +++
> include/dt-bindings/clock/mt8186-clk.h | 445 ++++++++++++++++++
> 3 files changed, 555 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-clock.yaml
> create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-sys-clock.yaml
> create mode 100644 include/dt-bindings/clock/mt8186-clk.h
>
> diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-clock.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-clock.yaml
> new file mode 100644
> index 000000000000..373e8a100da3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-clock.yaml
> @@ -0,0 +1,56 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mt8186-clock.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: Mediatek Functional Clock Controller for MT8186
s/Mediatek/MediaTek/
> +
> +maintainers:
> + - Chun-Jie Chen <chun-jie.chen@...iatek.com>
> +
> +description:
> + The clock architecture in Mediatek like below
s/Mediatek/MediaTek/
> + PLLs -->
> + dividers -->
> + muxes
> + -->
> + clock gate
> +
> + The devices provide clock gate control in different IP blocks.
> +
> +properties:
> + compatible:
> + items:
> + - enum:
> + - mediatek,mt8186-imp_iic_wrap
> + - mediatek,mt8186-mfgsys
> + - mediatek,mt8186-wpesys
> + - mediatek,mt8186-imgsys1
> + - mediatek,mt8186-imgsys2
> + - mediatek,mt8186-vdecsys
> + - mediatek,mt8186-vencsys
> + - mediatek,mt8186-camsys
> + - mediatek,mt8186-camsys_rawa
> + - mediatek,mt8186-camsys_rawb
> + - mediatek,mt8186-mdpsys
> + - mediatek,mt8186-ipesys
> + reg:
> + maxItems: 1
> +
> + '#clock-cells':
> + const: 1
> +
> +required:
> + - compatible
> + - reg
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + imp_iic_wrap: clock-controller@...17000 {
> + compatible = "mediatek,mt8186-imp_iic_wrap";
> + reg = <0x11017000 0x1000>;
> + #clock-cells = <1>;
> + };
> diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-sys-clock.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-sys-clock.yaml
> new file mode 100644
> index 000000000000..4c071dd66b76
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-sys-clock.yaml
> @@ -0,0 +1,54 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mt8186-sys-clock.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: Mediatek System Clock Controller for MT8186
>
s/Mediatek/MediaTek/
> +
> +maintainers:
> + - Chun-Jie Chen <chun-jie.chen@...iatek.com>
> +
> +description:
> + The clock architecture in Mediatek like below
s/Mediatek/MediaTek/
Thanks,
Miles
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