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Message-ID: <YioQdNNiGZlAIuJG@infradead.org>
Date:   Thu, 10 Mar 2022 06:51:32 -0800
From:   Christoph Hellwig <hch@...radead.org>
To:     Tom Lendacky <thomas.lendacky@....com>
Cc:     Dave Hansen <dave.hansen@...el.com>,
        "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>,
        tglx@...utronix.de, mingo@...hat.com, bp@...en8.de,
        luto@...nel.org, peterz@...radead.org,
        sathyanarayanan.kuppuswamy@...ux.intel.com, aarcange@...hat.com,
        ak@...ux.intel.com, dan.j.williams@...el.com, david@...hat.com,
        hpa@...or.com, jgross@...e.com, jmattson@...gle.com,
        joro@...tes.org, jpoimboe@...hat.com, knsathya@...nel.org,
        pbonzini@...hat.com, sdeep@...are.com, seanjc@...gle.com,
        tony.luck@...el.com, vkuznets@...hat.com, wanpengli@...cent.com,
        brijesh.singh@....com, x86@...nel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCHv5 27/30] x86/kvm: Use bounce buffers for TD guest

On Thu, Mar 10, 2022 at 08:29:01AM -0600, Tom Lendacky wrote:
> > void __init mem_encrypt_init(void)
> > {
> >          if (!cc_platform_has(CC_ATTR_MEM_ENCRYPT))
> 
> If you make this cc_platform_has(CC_ATTR_GUEST_MEM_ENCRYPT), then it should
> work for both, I would think. If you use CC_ATTR_MEM_ENCRYPT, you'll force
> bare-metal SME to always use bounce buffers when doing I/O. But SME can do
> I/O to encrypted memory if the device supports 64-bit DMA or if the IOMMU is
> being used, so we don't want to force SWIOTLB in this case.

http://git.infradead.org/users/hch/misc.git/commitdiff/18b0547fe0467cb48e64ee403f50f2587fe04e3a

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