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Message-Id: <20220311060936.10663-3-JJLIU0@nuvoton.com>
Date: Fri, 11 Mar 2022 14:09:35 +0800
From: jimliu2 <jim.t90615@...il.com>
To: JJLIU0@...oton.com, KWLIU@...oton.com, linus.walleij@...aro.org,
brgl@...ev.pl, robh+dt@...nel.org, avifishman70@...il.com,
tmaimon77@...il.com, tali.perry1@...il.com, venture@...gle.com,
yuenn@...gle.com, benjaminfair@...gle.com, jim.t90615@...il.com,
CTCCHIEN@...oton.com
Cc: linux-gpio@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, openbmc@...ts.ozlabs.org
Subject: [PATCH v1 2/3] dt-bindings: support Nuvoton sgpio
Add nuvoton sgpio yaml in dt-bindings
Signed-off-by: jimliu2 <JJLIU0@...oton.com>
---
.../bindings/gpio/nuvoton,sgpio.yaml | 78 +++++++++++++++++++
1 file changed, 78 insertions(+)
create mode 100644 Documentation/devicetree/bindings/gpio/nuvoton,sgpio.yaml
diff --git a/Documentation/devicetree/bindings/gpio/nuvoton,sgpio.yaml b/Documentation/devicetree/bindings/gpio/nuvoton,sgpio.yaml
new file mode 100644
index 000000000000..8766e1fa4528
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/nuvoton,sgpio.yaml
@@ -0,0 +1,78 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/gpio/nuvoton,sgpio.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nuvoton SGPIO controller
+
+maintainers:
+ - Jim LIU <JJLIU0@...oton.com>
+
+description:
+ This SGPIO controller is for NUVOTON NPCM7xx and NPCM8xx SoC,
+ NPCM7xx/NPCM8xx have two sgpio module each module can support up
+ to 64 output pins,and up to 64 input pin.
+ GPIO pins can be programmed to support the following options
+ - Support interrupt option for each input port and various interrupt
+ sensitivity option (level-high, level-low, edge-high, edge-low)
+ - Directly connected to APB bus and its shift clock is from APB bus clock
+ divided by a programmable value.
+ - ngpios is number of nin_gpios GPIO lines and nout_gpios GPIO lines.
+
+properties:
+ compatible:
+ enum:
+ - nuvoton,npcm750-sgpio
+ - nuvoton,npcm845-sgpio
+
+ reg:
+ maxItems: 1
+
+ gpio-controller: true
+
+ '#gpio-cells':
+ const: 2
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ nin_gpios: true
+
+ nout_gpios: true
+
+ bus-frequency: true
+
+required:
+ - compatible
+ - reg
+ - gpio-controller
+ - '#gpio-cells'
+ - interrupts
+ - nin_gpios
+ - nout_gpios
+ - clocks
+ - bus-frequency
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/nuvoton,npcm7xx-clock.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ sgpio1: sgpio@...000 {
+ compatible = "nuvoton,npcm750-sgpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0x101000 0x200>;
+ clocks = <&clk NPCM7XX_CLK_APB3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&iox1_pins>;
+ nin_gpios = <64>;
+ nout_gpios = <64>;
+ bus-frequency = <16000000>;
+ };
--
2.17.1
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