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Message-ID: <20220311080147.453483-3-tudor.ambarus@microchip.com>
Date: Fri, 11 Mar 2022 10:01:43 +0200
From: Tudor Ambarus <tudor.ambarus@...rochip.com>
To: <p.yadav@...com>, <michael@...le.cc>, <broonie@...nel.org>
CC: <miquel.raynal@...tlin.com>, <richard@....at>, <vigneshr@...com>,
<linux-mtd@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
<linux-spi@...r.kernel.org>, <nicolas.ferre@...rochip.com>,
Tudor Ambarus <tudor.ambarus@...rochip.com>
Subject: [PATCH v2 2/6] mtd: spi-nor: core: Allow specifying the byte order in DTR mode
Macronix swaps bytes on a 16-bit boundary when configured in Octal DTR.
The byte order of 16-bit words is swapped when read or written in 8D-8D-8D
mode compared to STR modes. Allow operations to specify the byte order in
DTR mode, so that controllers can swap the bytes back at run-time to
address the flash's endianness requirements, if they are capable. If the
controllers are not capable of swapping the bytes, the protocol is
downgraded via spi_nor_spimem_adjust_hwcaps(). When available, the swapping
of the bytes is always done regardless if it's a data or register access,
so that we comply with the JESD216 requirements: "Byte order of 16-bit
words is swapped when read in 8D-8D-8D mode compared to 1-1-1".
Signed-off-by: Tudor Ambarus <tudor.ambarus@...rochip.com>
---
drivers/mtd/spi-nor/core.c | 8 ++++++++
drivers/mtd/spi-nor/core.h | 1 +
2 files changed, 9 insertions(+)
diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index 5de46a786cc5..a69c2813f6fc 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -70,6 +70,13 @@ static u8 spi_nor_get_cmd_ext(const struct spi_nor *nor,
}
}
+static inline bool spi_nor_is_octal_dtr_swab16(const struct spi_nor *nor,
+ enum spi_nor_protocol proto)
+{
+ return (proto == SNOR_PROTO_8_8_8_DTR) &&
+ (nor->flags & SNOR_F_DTR_SWAB16);
+}
+
/**
* spi_nor_spimem_setup_op() - Set up common properties of a spi-mem op.
* @nor: pointer to a 'struct spi_nor'
@@ -105,6 +112,7 @@ void spi_nor_spimem_setup_op(const struct spi_nor *nor,
op->addr.dtr = true;
op->dummy.dtr = true;
op->data.dtr = true;
+ op->data.dtr_swab16 = spi_nor_is_octal_dtr_swab16(nor, proto);
/* 2 bytes per clock cycle in DTR mode. */
op->dummy.nbytes *= 2;
diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
index c83d5e75c563..0dcbc7a81e64 100644
--- a/drivers/mtd/spi-nor/core.h
+++ b/drivers/mtd/spi-nor/core.h
@@ -135,6 +135,7 @@ enum spi_nor_option_flags {
SNOR_F_IO_MODE_EN_VOLATILE = BIT(11),
SNOR_F_SOFT_RESET = BIT(12),
SNOR_F_SWP_IS_VOLATILE = BIT(13),
+ SNOR_F_DTR_SWAB16 = BIT(14),
};
struct spi_nor_read_command {
--
2.25.1
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