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Message-ID: <CAK8P3a1z6bCfhMUzqjDNaNWky52vH+NjQA5Qpo=0tABv4Z1Ocw@mail.gmail.com>
Date: Fri, 11 Mar 2022 09:19:21 +0100
From: Arnd Bergmann <arnd@...db.de>
To: "Hawkins, Nick" <nick.hawkins@....com>
Cc: "Verdun, Jean-Marie" <verdun@....com>,
Rob Herring <robh+dt@...nel.org>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Thomas Gleixner <tglx@...utronix.de>,
Wim Van Sebroeck <wim@...ux-watchdog.org>,
Guenter Roeck <linux@...ck-us.net>,
Russell King - ARM Linux <linux@...linux.org.uk>,
Arnd Bergmann <arnd@...db.de>, Olof Johansson <olof@...om.net>,
SoC Team <soc@...nel.org>, DTML <devicetree@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
LINUXWATCHDOG <linux-watchdog@...r.kernel.org>,
Linux ARM <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v3 00/10] ARM: Introduce HPE GXP Architecture
On Thu, Mar 10, 2022 at 8:51 PM <nick.hawkins@....com> wrote:
>
> From: Nick Hawkins <nick.hawkins@....com>
>
> Changes since v2:
> *Reduced size of changes, put them into pathset format
>
> Changes since v1:
> *Fix compiler warnings
>
> The GXP is the HPE BMC SoC that is used in the majority
> of HPE Generation 10 servers. Traditionally the asic will
> last multiple generations of server before being replaced.
>
> Info about SoC:
>
> HPE GXP is the name of the HPE Soc. This SoC is used to implement
> many BMC features at HPE. It supports ARMv7 architecture based on
> the Cortex A9 core. It is capable of using an AXI bus to which
> a memory controller is attached. It has multiple SPI interfaces
> to connect boot flash and BIOS flash. It uses a 10/100/1000 MAC
> for network connectivity. It has multiple i2c engines to drive
> connectivity with a host infrastructure. The initial patches
> enable the watchdog and timer enabling the host to be able to
> boot.
This looks much better already, thanks for following the normal
submission procedures. With the timing for the merge window, this
is now too late for 5.18, but let's try to get it into 5.19 then.
Arnd
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