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Message-Id: <20220311084114.16408-1-singh.kuldeep87k@gmail.com>
Date: Fri, 11 Mar 2022 14:11:14 +0530
From: Kuldeep Singh <singh.kuldeep87k@...il.com>
To: Rob Herring <robh+dt@...nel.org>, Ray Jui <rjui@...adcom.com>,
Scott Branden <sbranden@...adcom.com>,
bcm-kernel-feedback-list@...adcom.com
Cc: Florian Fainelli <f.fainelli@...il.com>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: [PATCH] ARM: dts: bcm-cygnus: Update spi clock properties
PL022 binding require two clocks to be defined but broadcom cygnus
platform doesn't comply with bindings and define only one clock.
Update spi clocks and clocks-names property by adding appropriate clock
reference to make it compliant with bindings.
CC: Florian Fainelli <f.fainelli@...il.com>
Signed-off-by: Kuldeep Singh <singh.kuldeep87k@...il.com>
---
arch/arm/boot/dts/bcm-cygnus.dtsi | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
index ad65be871938..f9f79ed82518 100644
--- a/arch/arm/boot/dts/bcm-cygnus.dtsi
+++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
@@ -397,8 +397,8 @@ spi0: spi@...28000 {
#size-cells = <0>;
interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&spi_0>;
- clocks = <&axi81_clk>;
- clock-names = "apb_pclk";
+ clocks = <&axi81_clk>, <&axi81_clk>;
+ clock-names = "sspclk", "apb_pclk";
status = "disabled";
};
@@ -409,8 +409,8 @@ spi1: spi@...29000 {
#size-cells = <0>;
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&spi_1>;
- clocks = <&axi81_clk>;
- clock-names = "apb_pclk";
+ clocks = <&axi81_clk>, <&axi81_clk>;
+ clock-names = "sspclk", "apb_pclk";
status = "disabled";
};
@@ -421,8 +421,8 @@ spi2: spi@...2a000 {
#size-cells = <0>;
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&spi_2>;
- clocks = <&axi81_clk>;
- clock-names = "apb_pclk";
+ clocks = <&axi81_clk>, <&axi81_clk>;
+ clock-names = "sspclk", "apb_pclk";
status = "disabled";
};
--
2.25.1
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