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Message-ID: <aa65e94f-eaff-0646-8f07-c0ba0cf9abd1@canonical.com>
Date: Fri, 11 Mar 2022 10:32:28 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
To: nick.hawkins@....com, verdun@....com
Cc: Daniel Lezcano <daniel.lezcano@...aro.org>,
Thomas Gleixner <tglx@...utronix.de>,
Rob Herring <robh+dt@...nel.org>, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org
Subject: Re: [PATCH v3 05/10] dt-bindings: timer: Add HPE GXP Timer Binding
On 10/03/2022 20:52, nick.hawkins@....com wrote:
> From: Nick Hawkins <nick.hawkins@....com>
>
> Creating binding for gxp timer in device tree hpe,gxp-timer
> Although there are multiple times on the SoC we are only
> enabling one at this time.
>
> Signed-off-by: Nick Hawkins <nick.hawkins@....com>
>
> ----
>
> v2:
> *Removed maintainer change from patch
> *Verified there was no compilation errors
> *Added reference code in separate patch of patchset
> ---
> .../bindings/timer/hpe,gxp-timer.yaml | 45 +++++++++++++++++++
> 1 file changed, 45 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/timer/hpe,gxp-timer.yaml
>
> diff --git a/Documentation/devicetree/bindings/timer/hpe,gxp-timer.yaml b/Documentation/devicetree/bindings/timer/hpe,gxp-timer.yaml
> new file mode 100644
> index 000000000000..1f4e345c5fb8
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/hpe,gxp-timer.yaml
> @@ -0,0 +1,45 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/timer/hpe,gxp-timer.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: HPE GXP TIMER
> +
> +maintainers:
> + - Nick Hawkins <nick.hawkins@....com>
> + - Jean-Marie Verdun <verdun@....com>
> +
> +properties:
> + compatible:
> + const: hpe,gxp-timer
> +
> + reg:
> + items:
> + - description: T0CNT register
> + - description: T0CS register
> + - description: TIMELO register
> +
> + interrupts:
> + maxItems: 1
> +
> + clock-frequency:
> + description: The frequency of the clock that drives the counter, in Hz.
Which clock is it? Generated inside the timer? If outside, why driver
does not take the reference to it and uses clk_get_rate()?
Best regards,
Krzysztof
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